• Run with minimum HTTPS and .mjs type (Was: In AI Acceleration nobody cares about CivetWeb)

    From Mild Shock@janburse@fastmail.fm to comp.lang.prolog,sci.logic,sci.physics on Wed Jul 29 11:41:51 2026
    From Newsgroup: sci.physics

    Hi,

    Maybe there is a Rossy Boy flux generator
    web server with infinity and continuity
    HTTPS and .mjs type, aka SIMT halucination.

    To run the GPU example that is written in HTML,
    JavaScript and WebGPU / WGSL, the minium is
    possibly a HTTPS server that can deliver the

    right mime type for the .mjs extension. Its
    then only a bundle of static pages that does
    the demonstration. What worked on my side

    is the IntelliJ browse button, which then uses
    a small local server on its own, sandboxed to
    serving some project files.

    But this is only how to launch the test pages.

    The Rossy Boy SIMT halucination, ould also work, who knows?

    Bye

    Mild Shock schrieb:
    Hi,

    Nobody cares about CivetWeb a C++/C library,
    the rossy boy moron refuses to understand this
    simple GPU test, that shows some AI Acceleration:

    11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

    Bye

    Johann 'Myrkraverk' Oskarsson schrieb:
    Why not?-a Isn't this comp.lang.c?-a And isn't that exactly how
    CivetWeb works internally?-a Have you never built your own web
    sever in C?-a Not even with CivetWeb?-a It's really easy!-a You
    only need to implement a callback or two.

    Mild Shock schrieb:
    Hi,

    I already posted the candidate MPMC queue
    to do these things. But my research is
    not yet conclusive:

    Its actually quite amazing. Gemini, DeepSeek,
    OpenAI all know Dmitriy V'jukov. I have asked
    the IntelliJ integrated Freeium AI to generate

    some code for me, I guess their service uses
    by default OpenAI (Codex), and had it reviewed
    by Gemini and DeepSeek. These AIs started lecturing

    me about lazySet() in Java. But I went with set():

    -a-a-a-a private static boolean enqueue(Queue q, Object data) {
    -a-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
    -a-a-a-a-a-a-a-a for (; ; ) {
    -a-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask;
    -a-a-a-a-a-a-a-a-a-a-a-a int seq = q.sequences.get(index);
    -a-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
    -a-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data;
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.set(index, pos + 1); >> -a>-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
    -a-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
    -a-a-a-a-a-a-a-a-a-a-a-a } else {
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
    -a-a-a-a-a-a-a-a-a-a-a-a }
    -a-a-a-a-a-a-a-a }
    -a-a-a-a }

    The above version seems to be more suitable
    for my purpose, since it allows polling, it
    basically implements offer(). While the

    version posted on in the lock free group
    by Chris M. Thomasson implements a spin wait
    blocking put() already.

    Bye

    Mild Shock schrieb:
    Hi,

    Confused rossy boy is confused. We are
    not building a stupid web server, where
    a listener thread spawns service threads,

    and to avoid malloc and free, reuses
    a pool, or some shitty fork join framework.
    The producer and consumer example I posted

    elsewhere archived a dataflow without
    malloc and free of threads. You are miles
    away from what we are doing here.

    Bye

    Ross Finlayson schrieb:
    This is with infinity and continuity,
    SIMT is a worker pool.

    Mild Shock schrieb:
    Hi,

    Moron there is no SIMT. As I already wrote:

    He is also not Zweistein, since he doesn't
    understand concepts such as:

    - NVIDIA Volta ff. architecture

    But you had the SIMD and MIMD disctinction
    alreay in OpenMP (via #pragma omp simd and
    #pragma omp parallel):

    Flynn's Taxonomy classifies computer architectures
    according to how many instruction streams (processes)
    and data streams they can process simultaneously,
    dividing them into four categories:
    SISD, SIMD, MISD, and MIMD.
    https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/


    Its not so difficult to understand what
    the NVIDIA Volta ff. architecture means.

    Bye

    Ross Finlayson schrieb:
    They're considered really quite simple,
    each of those threads is simple, SIMT.

    Ross Finlayson schrieb:
    On 06/25/2021 07:54 PM, Archimedes Plutonium wrote:
    On Monday, June 21, 2021 at 12:00:21 PM UTC-5, Graham Cooper wrote: >>>>>>> On Tuesday, June 22, 2021 at 2:54:40 AM UTC+10, burs...@gmail.com >>>>>>> wrote:
    Try yourself:
    misc.prolog.compound.parenthesis.missing

    LMAO!

    Jan you work too hard. nobody wants theorem provers on prolog

    ASIMO tech is going to LISP which will just have a UNIFY routine >>>>>>>
    but people can LEARN PROLOG if you EFF OFF!



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  • From Mild Shock@janburse@fastmail.fm to comp.lang.prolog,sci.logic,sci.physics on Wed Jul 29 11:53:09 2026
    From Newsgroup: sci.physics

    Hi,

    Your strictness is your problem , not mine.
    The WebGPU / WGSL has explicitly an API
    for so called compute shaders.

    You can also combine compute shaders and
    render shaders. But to use compute shaders
    for AI acceration is not uncommon now.

    See the WebLLM project by OpenAI where a
    transformer is just a WebGPU / WGSL
    pipeline type:

    WebLLM: High-Performance
    In-Browser LLM Inference Engine
    https://webllm.mlc.ai/

    But I do not assume that everybody is
    crawling out of under his rock. And trying
    to understand what happens with post NVIDIA

    Volta GPUs that come as mobile iGPUs.

    Take your time.

    Bye

    Johann 'Myrkraverk' Oskarsson schrieb:
    On 29/07/2026 5:27 PM, Mild Shock wrote:
    Hi,

    Nobody cares about CivetWeb a C++/C library,
    the rossy boy moron refuses to understand this
    simple GPU test, that shows some AI Acceleration:

    I don't know about you, but I don't run my webserver on my GPU. I use
    it strictly for graphics.


    Mild Shock schrieb:
    Hi,

    Maybe there is a Rossy Boy flux generator
    web server with infinity and continuity
    HTTPS and .mjs type, aka SIMT halucination.

    To run the GPU example that is written in HTML,
    JavaScript and WebGPU / WGSL, the minium is
    possibly a HTTPS server that can deliver the

    right mime type for the .mjs extension. Its
    then only a bundle of static pages that does
    the demonstration. What worked on my side

    is the IntelliJ browse button, which then uses
    a small local server on its own, sandboxed to
    serving some project files.

    But this is only how to launch the test pages.

    The Rossy Boy SIMT halucination, ould also work, who knows?

    Bye

    Mild Shock schrieb:
    Hi,

    Nobody cares about CivetWeb a C++/C library,
    the rossy boy moron refuses to understand this
    simple GPU test, that shows some AI Acceleration:

    11.4 Giga Lips with a Budget Laptop
    https://github.com/Jean-Luc-Picard-2021/gigabudget

    Bye

    Johann 'Myrkraverk' Oskarsson schrieb:
    Why not?-a Isn't this comp.lang.c?-a And isn't that exactly how
    CivetWeb works internally?-a Have you never built your own web
    sever in C?-a Not even with CivetWeb?-a It's really easy!-a You
    only need to implement a callback or two.

    Mild Shock schrieb:
    Hi,

    I already posted the candidate MPMC queue
    to do these things. But my research is
    not yet conclusive:

    Its actually quite amazing. Gemini, DeepSeek,
    OpenAI all know Dmitriy V'jukov. I have asked
    the IntelliJ integrated Freeium AI to generate

    some code for me, I guess their service uses
    by default OpenAI (Codex), and had it reviewed
    by Gemini and DeepSeek. These AIs started lecturing

    me about lazySet() in Java. But I went with set():

    -a-a-a-a private static boolean enqueue(Queue q, Object data) {
    -a-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
    -a-a-a-a-a-a-a-a for (; ; ) {
    -a-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask;
    -a-a-a-a-a-a-a-a-a-a-a-a int seq = q.sequences.get(index);
    -a-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
    -a-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data;
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.set(index, pos + 1);
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
    -a-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
    -a-a-a-a-a-a-a-a-a-a-a-a } else {
    -a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
    -a-a-a-a-a-a-a-a-a-a-a-a }
    -a-a-a-a-a-a-a-a }
    -a-a-a-a }

    The above version seems to be more suitable
    for my purpose, since it allows polling, it
    basically implements offer(). While the

    version posted on in the lock free group
    by Chris M. Thomasson implements a spin wait
    blocking put() already.

    Bye

    Mild Shock schrieb:
    Hi,

    Confused rossy boy is confused. We are
    not building a stupid web server, where
    a listener thread spawns service threads,

    and to avoid malloc and free, reuses
    a pool, or some shitty fork join framework.
    The producer and consumer example I posted

    elsewhere archived a dataflow without
    malloc and free of threads. You are miles
    away from what we are doing here.

    Bye

    Ross Finlayson schrieb:
    This is with infinity and continuity,
    SIMT is a worker pool.

    Mild Shock schrieb:
    Hi,

    Moron there is no SIMT. As I already wrote:

    He is also not Zweistein, since he doesn't
    understand concepts such as:

    - NVIDIA Volta ff. architecture

    But you had the SIMD and MIMD disctinction
    alreay in OpenMP (via #pragma omp simd and
    #pragma omp parallel):

    Flynn's Taxonomy classifies computer architectures
    according to how many instruction streams (processes)
    and data streams they can process simultaneously,
    dividing them into four categories:
    SISD, SIMD, MISD, and MIMD.
    https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/


    Its not so difficult to understand what
    the NVIDIA Volta ff. architecture means.

    Bye

    Ross Finlayson schrieb:
    They're considered really quite simple,
    each of those threads is simple, SIMT.

    Ross Finlayson schrieb:
    On 06/25/2021 07:54 PM, Archimedes Plutonium wrote:
    On Monday, June 21, 2021 at 12:00:21 PM UTC-5, Graham Cooper wrote: >>>>>>>> On Tuesday, June 22, 2021 at 2:54:40 AM UTC+10,
    burs...@gmail.com wrote:
    Try yourself:
    misc.prolog.compound.parenthesis.missing

    LMAO!

    Jan you work too hard. nobody wants theorem provers on prolog

    ASIMO tech is going to LISP which will just have a UNIFY routine >>>>>>>>
    but people can LEARN PROLOG if you EFF OFF!




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