From Newsgroup: sci.math

On 7/19/2026 2:53 AM, Mild Shock wrote:

Hi,

I'm a spinner, I'm a sinner
I spin on CAS loops for my dinner
Some call it busy-wait, I call it fate
When the queue is empty, I just rotate

2 Producer threads, 2 Consumer threads
Each Producer generating 8192 items
the single common channel between
them 128 elements larger.

public class DmitryVyukov
8 ms
public class DougLea
10 ms

On the Ryzen AI 7 350 which has 8 physical
cores with hyperthreading, making it 16
logical cores.

LoL

Bye

See also:

Producer-Consumer Queues by Dmitry Vyukov https://sites.google.com/site/1024cores/home/lock-free-algorithms/queues

Steve Miller Band - The Joker (Official Music Video) https://www.youtube.com/watch?v=dV3AziKTBUo

Mild Shock schrieb:

Hi,

Ok I was looking at this learning challenge,
producing vector (y1,y2,y3,y4) from a vector
(x1,x2,x3,x4), System R can do it via least square?

| 0 0 0 1 |-a-a | x1 |-a-a-a-a | x4 |
| 0 0 1 0 |-a-a | x2 |-a =-a | x3 |
| 0 1 0 0 |-a-a | x3 |-a-a-a-a | x2 |
| 1 0 0 0 |-a-a | x4 |-a-a-a-a | x1 |

How it started:

"multiplicative RNNs arises naturally from a
proof-theoretic interpretation of next-token
prediction as nested intuitionistic implication"
Paul Tarau - 2026
https://arxiv.org/abs/2601.19915

How its going:

"Dave uses a PDP-11 to train a real Neural
Network complete with Transformers and
Attention so you can see them at their most basic."
Mr. Taskmanager - 2026
https://www.youtube.com/watch?v=OUE3FSIk46g

We see Doctor Frankstein in action from
the Bronze Age of Computing, producing
a Humunkulus, the progenitor of todays

Bulgakov Shuriks in the Hyperscale Age!

Bye

P.S.: My impression neither cut to the core, that
this incredible transformer most likely
produced this deterministic attention:

| -1 | * | k | + | 5 | = | k' |

Or differently expressed y_k = x_{5-k}.

How did the transformer do it? It produced
a neural network with 1216 parameters, but
didn't use embeddings or polar encoding

of positions. But if we strip the noise
and denoise from the position encoding,
the denoise is done via softmax. We somehow

must get the above, right? I still need to
verify my claim! BTW: The PDP-11 assembly
from 1979 uses wider example not with n=4

but with n=8.

I am friends with Dmitry Vyukov from way back, 23+ years ago. Actually,
I helped him find some bugs in Relacy when it was in pre-alpha way back
on comp.programming.threads. Also, I created some neat eventcount algos,
read all:

https://gist.github.com/mratsim/04a29bdd98d6295acda4d0677c4d0041

For starters... ;^)
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/19/2026 2:04 PM, Chris M. Thomasson wrote:

On 7/19/2026 2:53 AM, Mild Shock wrote:

Hi,

I'm a spinner, I'm a sinner
I spin on CAS loops for my dinner
Some call it busy-wait, I call it fate
When the queue is empty, I just rotate

2 Producer threads, 2 Consumer threads
Each Producer generating 8192 items
the single common channel between
them 128 elements larger.

public class DmitryVyukov
8 ms
public class DougLea
10 ms

On the Ryzen AI 7 350 which has 8 physical
cores with hyperthreading, making it 16
logical cores.

LoL

Bye

See also:

Producer-Consumer Queues by Dmitry Vyukov
https://sites.google.com/site/1024cores/home/lock-free-algorithms/queues

Steve Miller Band - The Joker (Official Music Video)
https://www.youtube.com/watch?v=dV3AziKTBUo

Mild Shock schrieb:

Hi,

Ok I was looking at this learning challenge,
producing vector (y1,y2,y3,y4) from a vector
(x1,x2,x3,x4), System R can do it via least square?

| 0 0 0 1 |-a-a | x1 |-a-a-a-a | x4 |
| 0 0 1 0 |-a-a | x2 |-a =-a | x3 |
| 0 1 0 0 |-a-a | x3 |-a-a-a-a | x2 |
| 1 0 0 0 |-a-a | x4 |-a-a-a-a | x1 |

How it started:

"multiplicative RNNs arises naturally from a
proof-theoretic interpretation of next-token
prediction as nested intuitionistic implication"
Paul Tarau - 2026
https://arxiv.org/abs/2601.19915

How its going:

"Dave uses a PDP-11 to train a real Neural
Network complete with Transformers and
Attention so you can see them at their most basic."
Mr. Taskmanager - 2026
https://www.youtube.com/watch?v=OUE3FSIk46g

We see Doctor Frankstein in action from
the Bronze Age of Computing, producing
a Humunkulus, the progenitor of todays

Bulgakov Shuriks in the Hyperscale Age!

Bye

P.S.: My impression neither cut to the core, that
this incredible transformer most likely
produced this deterministic attention:

| -1 | * | k | + | 5 | = | k' |

Or differently expressed y_k = x_{5-k}.

How did the transformer do it? It produced
a neural network with 1216 parameters, but
didn't use embeddings or polar encoding

of positions. But if we strip the noise
and denoise from the position encoding,
the denoise is done via softmax. We somehow

must get the above, right? I still need to
verify my claim! BTW: The PDP-11 assembly
from 1979 uses wider example not with n=4

but with n=8.

I am friends with Dmitry Vyukov from way back, 23+ years ago. Actually,
I helped him find some bugs in Relacy when it was in pre-alpha way back
on comp.programming.threads. Also, I created some neat eventcount algos, read all:

https://gist.github.com/mratsim/04a29bdd98d6295acda4d0677c4d0041

For starters... ;^)

also, I made a neat alteration to one of Dmitry Vyukov MPMC queues,
check it out:

https://groups.google.com/g/lock-free/c/acjQ3-89abE/m/a6-Di0GZsyEJ

can you get to the link? Thanks. Read all.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Its actually quite amazing. Gemini, DeepSeek,
OpenAI all know Dmitriy V'jukov. I have asked
the IntelliJ integrated Freeium AI to generate

some code for me, I guess their service uses
by default OpenAI (Codex), and had it reviewed
by Gemini and DeepSeek. These AIs started lecturing

me about lazySet() in Java. But I went with set():

private static boolean enqueue(Queue q, Object data) {
int pos = q.enqueuePos.get();
for (; ; ) {
int index = pos & q.bufferMask;
int seq = q.sequences.get(index);
int dif = seq - pos;
if (dif == 0) {
if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
q.data[index] = data;
q.sequences.set(index, pos + 1);
return true;
}
pos = q.enqueuePos.get();
} else if (dif < 0) {
return false;
} else {
pos = q.enqueuePos.get();
}
}
}

The above version seems to be more suitable
for my purpose, since it allows polling, it
basically implements offer(). While the

version posted on in the lock free group
by Chris M. Thomasson implements a spin wait
blocking put() already.

But I didn't port it yet to JavaScript or WGSL.
Currently busy with realizing a Worker facade
in JavaScript for a CPU backend that will run

in both the browser and node.js.

Bye

Chris M. Thomasson schrieb:

On 7/19/2026 2:04 PM, Chris M. Thomasson wrote:

On 7/19/2026 2:53 AM, Mild Shock wrote:

Hi,

I'm a spinner, I'm a sinner
I spin on CAS loops for my dinner
Some call it busy-wait, I call it fate
When the queue is empty, I just rotate

2 Producer threads, 2 Consumer threads
Each Producer generating 8192 items
the single common channel between
them 128 elements larger.

public class DmitryVyukov
8 ms
public class DougLea
10 ms

On the Ryzen AI 7 350 which has 8 physical
cores with hyperthreading, making it 16
logical cores.

LoL

Bye

See also:

Producer-Consumer Queues by Dmitry Vyukov
https://sites.google.com/site/1024cores/home/lock-free-algorithms/queues >>>
Steve Miller Band - The Joker (Official Music Video)
https://www.youtube.com/watch?v=dV3AziKTBUo

Mild Shock schrieb:

Hi,

Ok I was looking at this learning challenge,
producing vector (y1,y2,y3,y4) from a vector
(x1,x2,x3,x4), System R can do it via least square?

| 0 0 0 1 |-a-a | x1 |-a-a-a-a | x4 |
| 0 0 1 0 |-a-a | x2 |-a =-a | x3 |
| 0 1 0 0 |-a-a | x3 |-a-a-a-a | x2 |
| 1 0 0 0 |-a-a | x4 |-a-a-a-a | x1 |

How it started:

"multiplicative RNNs arises naturally from a
proof-theoretic interpretation of next-token
prediction as nested intuitionistic implication"
Paul Tarau - 2026
https://arxiv.org/abs/2601.19915

How its going:

"Dave uses a PDP-11 to train a real Neural
Network complete with Transformers and
Attention so you can see them at their most basic."
Mr. Taskmanager - 2026
https://www.youtube.com/watch?v=OUE3FSIk46g

We see Doctor Frankstein in action from
the Bronze Age of Computing, producing
a Humunkulus, the progenitor of todays

Bulgakov Shuriks in the Hyperscale Age!

Bye

P.S.: My impression neither cut to the core, that
this incredible transformer most likely
produced this deterministic attention:

| -1 | * | k | + | 5 | = | k' |

Or differently expressed y_k = x_{5-k}.

How did the transformer do it? It produced
a neural network with 1216 parameters, but
didn't use embeddings or polar encoding

of positions. But if we strip the noise
and denoise from the position encoding,
the denoise is done via softmax. We somehow

must get the above, right? I still need to
verify my claim! BTW: The PDP-11 assembly
from 1979 uses wider example not with n=4

but with n=8.

I am friends with Dmitry Vyukov from way back, 23+ years ago.
Actually, I helped him find some bugs in Relacy when it was in
pre-alpha way back on comp.programming.threads. Also, I created some
neat eventcount algos, read all:

https://gist.github.com/mratsim/04a29bdd98d6295acda4d0677c4d0041

For starters... ;^)

also, I made a neat alteration to one of Dmitry Vyukov MPMC queues,
check it out:

https://groups.google.com/g/lock-free/c/acjQ3-89abE/m/a6-Di0GZsyEJ

can you get to the link? Thanks. Read all.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

me about lazySet() in Java. But I went with set():

private static boolean enqueue(Queue q, Object data) {
int pos = q.enqueuePos.get();
for (; ; ) {
int index = pos & q.bufferMask; int seq =
q.sequences.get(index);
int dif = seq - pos;
if (dif == 0) {
if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
q.data[index] = data; q.sequences.set(index, pos +
1);
return true;
}
pos = q.enqueuePos.get();
} else if (dif < 0) {
return false;
} else {
pos = q.enqueuePos.get();
}
}
}

The above version seems to be more suitable for my purpose, since it
allows polling, it basically implements offer(). While the

completely nonsense. Not even correct grammatically
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

completely nonsense. Not even correct grammatically

Yes of course, Micro Penis will know. Nothing, LoL
But here we find how village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core
topology are "embedded cpu registers area,
it has nothing to do with the ram." That is
a brilliant piece of hardware fiction.

Caches are SRAM acting as a hierarchical
staging ground for and backed by system
or device RAM, not an alternate dimension
divorced from memory entirely.

And calling cache hierarchies "registers"
is like confusing a warehouse parking lot
with the glove compartment of a single car.
Never heard of the crossbar in AMD GPUs?

LoL

Bye

Obelin Baisaroff schrieb:

Ross Finlayson wrote:

access to memory, has that these days with
L1/L2/L3 caches and the proximity and affinity
in the topology of the cores and

those are embedded cpu registers area, it has
nothing to do with the ram. Works by higher
clocks compared, but merely useless in AI.

Romelio Balakhonsky schrieb:

Mild Shock wrote:

me about lazySet() in Java. But I went with set():

private static boolean enqueue(Queue q, Object data) {
int pos = q.enqueuePos.get();
for (; ; ) {
int index = pos & q.bufferMask; int seq =
q.sequences.get(index);
int dif = seq - pos;
if (dif == 0) {
if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
q.data[index] = data; q.sequences.set(index, pos +
1);
return true;
}
pos = q.enqueuePos.get();
} else if (dif < 0) {
return false;
} else {
pos = q.enqueuePos.get();
}
}
}

The above version seems to be more suitable for my purpose, since it
allows polling, it basically implements offer(). While the

completely nonsense. Not even correct grammatically

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

If you don't know how GPU caches work.
Just RTFM the RDNA 3.5 specs! They have
some explanations in the docs, what jobs

the GPU cache lines do, in relation to
what instructions:

Abbreviation for rCyRead The Fucking ManualrCO. http://www.catb.org/esr/jargon/html/R/RTFM.html

Here some RDNA 4.0 specs (smaller GPUs):

"RDNA4" Instruction Set Architecture
Reference Guide - 7-April-2025 https://docs.amd.com/v/u/en-US/rdna4-instruction-set-architecture

Here some CDNA 4.0 specs (bigger GPUs):

CDNA4 Instruction Set Architecture
Reference Guide - 5-August-2025 https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/amd-instinct-cdna4-instruction-set-architecture.pdf

Bye

But the difference between CDNA GPUs and
RDNA GPUs seems not to be that big, at least
in 2025:

Commitment to High-Performance
Computing in the Age of AI https://docs.amd.com/v/u/en-US/precision-at-scale-amd-whitepaper

While the Copilot+ threshold is 45 TFLOPs,
a MI355X, Datacenter, rack-mounted, liquid cooling,
has surely more memory, but only 157 TFLOPS.

And RTX 5090, Desktop, 600W+ TDP, massive cooling,
has also only 100 TFLOPS. So it looks these
Copilot+ AI Laptops are pretty swell, arent they?

Mild Shock schrieb:

Hi,

completely nonsense. Not even correct grammatically

Yes of course, Micro Penis will know. Nothing, LoL
But here we find how village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core
topology are "embedded cpu registers area,
it has nothing to do with the ram." That is
a brilliant piece of hardware fiction.

Caches are SRAM acting as a hierarchical
staging ground for and backed by system
or device RAM, not an alternate dimension
divorced from memory entirely.

And calling cache hierarchies "registers"
is like confusing a warehouse parking lot
with the glove compartment of a single car.
Never heard of the crossbar in AMD GPUs?

LoL

Bye

Obelin Baisaroff schrieb:

Ross Finlayson wrote:

access to memory, has that these days with
L1/L2/L3 caches and the proximity and affinity
in the topology of the cores and

those are embedded cpu registers area, it has
nothing to do with the ram. Works by higher
clocks compared, but merely useless in AI.

Romelio Balakhonsky schrieb:

Mild Shock wrote:

me about lazySet() in Java. But I went with set():

-a-a-a-a-a private static boolean enqueue(Queue q, Object data) {
-a-a-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a for (; ; ) {
-a-a-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask; int seq =
-a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.get(index);
-a-a-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
-a-a-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data; q.sequences.set(index, pos +
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a 1);
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
-a-a-a-a-a-a-a-a-a-a-a-a-a } else {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a }

The above version seems to be more suitable for my purpose, since it
allows polling, it basically implements offer(). While the

completely nonsense. Not even correct grammatically

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

in high-stakes environmentsrCowhether
it's enterprise servers running mission-
critical transactions or heavy parallel
compute clusters crunching massive datasets.

At scale, a "soft error" (a bit randomly
flipping from 0 to 1) isn't a rare anomaly;
it is a statistical certainty.

ECC requires extra bits per data word
(e.g., a 72-bit bus for 64 bits of data) a
nd a small computational cycle overhead to
compute and check parity bits on every access.

instead of instantly crashing the entire
system, modern processors use data poisoning.
The memory controller or cache logic stamps a
"poison bit" or signature onto that specific

cache line and propagates it along with
the corrupted data.

Bye

Mild Shock schrieb:

Hi,

If you don't know how GPU caches work.
Just RTFM the RDNA 3.5 specs! They have
some explanations in the docs, what jobs

the GPU cache lines do, in relation to
what instructions:

Abbreviation for rCyRead The Fucking ManualrCO. http://www.catb.org/esr/jargon/html/R/RTFM.html

Here some RDNA 4.0 specs (smaller GPUs):

"RDNA4" Instruction Set Architecture
Reference Guide - 7-April-2025 https://docs.amd.com/v/u/en-US/rdna4-instruction-set-architecture

Here some CDNA 4.0 specs (bigger GPUs):

CDNA4 Instruction Set Architecture
Reference Guide - 5-August-2025 https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/amd-instinct-cdna4-instruction-set-architecture.pdf

Bye

But the difference between CDNA GPUs and
RDNA GPUs seems not to be that big, at least
in 2025:

Commitment to High-Performance
Computing in the Age of AI https://docs.amd.com/v/u/en-US/precision-at-scale-amd-whitepaper

While the Copilot+ threshold is 45 TFLOPs,
a MI355X, Datacenter, rack-mounted, liquid cooling,
has surely more memory, but only 157 TFLOPS.

And RTX 5090, Desktop, 600W+ TDP, massive cooling,
has also only 100 TFLOPS. So it looks these
Copilot+ AI Laptops are pretty swell, arent they?

Mild Shock schrieb:

Hi,

completely nonsense. Not even correct grammatically

Yes of course, Micro Penis will know. Nothing, LoL
But here we find how village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core
topology are "embedded cpu registers area,
it has nothing to do with the ram." That is
a brilliant piece of hardware fiction.

Caches are SRAM acting as a hierarchical
staging ground for and backed by system
or device RAM, not an alternate dimension
divorced from memory entirely.

And calling cache hierarchies "registers"
is like confusing a warehouse parking lot
with the glove compartment of a single car.
Never heard of the crossbar in AMD GPUs?

LoL

Bye

Obelin Baisaroff schrieb:

Ross Finlayson wrote:

access to memory, has that these days with
L1/L2/L3 caches and the proximity and affinity
in the topology of the cores and

those are embedded cpu registers area, it has
nothing to do with the ram. Works by higher
clocks compared, but merely useless in AI.

Romelio Balakhonsky schrieb:

Mild Shock wrote:

me about lazySet() in Java. But I went with set():

-a-a-a-a-a private static boolean enqueue(Queue q, Object data) {
-a-a-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a for (; ; ) {
-a-a-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask; int seq =
-a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.get(index);
-a-a-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
-a-a-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data; q.sequences.set(index,
pos +
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a 1);
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
-a-a-a-a-a-a-a-a-a-a-a-a-a } else {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a }

The above version seems to be more suitable for my purpose, since it
allows polling, it basically implements offer(). While the

completely nonsense. Not even correct grammatically

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Yes of course, Micro Penis will know. Nothing, LoL But here we find how village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core topology are "embedded cpu
registers area,
it has nothing to do with the ram." That is a brilliant piece of
hardware fiction.

Caches are SRAM acting as a hierarchical

imbecile, formatting code like that puts you in prison in normal
countries. You are using entire lines for single chars, ie "}" etc,
imbecile.

also, fucking lying illiterate imbecile

L1, L2, and L3 caches are located on the CPU, not in the system RAM. They
form a high-speed memory hierarchy embedded directly within or immediately adjacent to the processor cores to minimize data access latency.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

You are a moron right? Modern GPU has its
own L1,..,Ln caches. RTFM ASAP you brain
amputated vodka alcoholic.

Russian Hardbass - Crazy Dance
https://www.youtube.com/watch?v=6OoglRuT0jY

Bye

Jeiker Makulov schrieb:

Mild Shock wrote:

Yes of course, Micro Penis will know. Nothing, LoL But here we find how
village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core topology are "embedded cpu
registers area,
it has nothing to do with the ram." That is a brilliant piece of
hardware fiction.

Caches are SRAM acting as a hierarchical

imbecile, formatting code like that puts you in prison in normal
countries. You are using entire lines for single chars, ie "}" etc, imbecile.

also, fucking lying illiterate imbecile

L1, L2, and L3 caches are located on the CPU, not in the system RAM. They form a high-speed memory hierarchy embedded directly within or immediately adjacent to the processor cores to minimize data access latency.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Just read something for once you alcoholic:

GPU Cache Hierarchy: Understanding L1, L2, and VRAM https://charlesgrassi.dev/blog/gpu-cache-hierarchy/

Measuring Cache Efficiency

GPU profilers like NVIDIA Nsight, AMD Radeon
GPU Profiler, and RenderDoc expose cache hit
rates and memory throughput. Key metrics to watch:

- L1 Hit Rate: Should be >80% for well-optimized
shaders. Below 60% indicates access pattern problems.
- L2 Hit Rate: Measures working set fit.
Below 70% suggests texture thrashing or too many unique textures.
- Texture Memory Throughput: Compare to theoretical
max. Low throughput with high latency = cache misses.
- Memory-bound vs Compute-bound: If memory is the
bottleneck, cache optimization has highest impact.

If the GPU is a discrete GPU, it has VRAM,
If the GPU is an accelerator processing unit (APU),
it shares the system memory with the CPU.

In the APU scenrio often advanced unified memory
is used, which can be multi channel for example.
The high L1 and L2 hit rate for shaders, translates

also to pi-WAM. Which shows, in the example I used,
a quite good GPU saturation, less memory bound and
more compute bound. I have compute these figures already.

Bye

Mild Shock schrieb:

Hi,

You are a moron right? Modern GPU has its
own L1,..,Ln caches. RTFM ASAP you brain
amputated vodka alcoholic.

Russian Hardbass - Crazy Dance
https://www.youtube.com/watch?v=6OoglRuT0jY

Bye

Jeiker Makulov schrieb:

Mild Shock wrote:

Yes of course, Micro Penis will know. Nothing, LoL But here we find how
village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core topology are "embedded cpu
registers area,
it has nothing to do with the ram." That is a brilliant piece of
hardware fiction.

Caches are SRAM acting as a hierarchical

imbecile, formatting code like that puts you in prison in normal
countries. You are using entire lines for single chars, ie-a "}" etc,
imbecile.

also, fucking lying illiterate imbecile

L1, L2, and L3 caches are located on the CPU, not in the system RAM. They
form a high-speed memory hierarchy embedded directly within or
immediately
adjacent to the processor cores to minimize data access latency.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Just read something for once you alcoholic:

GPU Cache Hierarchy: Understanding L1, L2, and VRAM https://charlesgrassi.dev/blog/gpu-cache-hierarchy/

Measuring Cache Efficiency

GPU profilers like NVIDIA Nsight, AMD Radeon GPU Profiler, and RenderDoc expose cache hit rates and memory throughput. Key metrics to watch:

nothing. That's too located close to the same cpu, idiot. It has nothing
to do with anything. This cretin dontt undrestand what a cache is. He
thinks it's ram.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

That's too located close to the same cpu, idiot.

Yes, colocating a CPU and GPU onto the same
processor die or package provides massive b
enefits, primarily by eliminating the latency
and bandwidth bottlenecks of moving data
across a motherboard.

Individual L1 Caches: Yes, the CPU cores and
the GPU compute units (Streaming Multiprocessors /
Compute Units) still maintain private,
individual L1 caches.

The "Colocation" Benefit: In traditional
setups (a separate CPU and GPU on PCIe slots),
data must be copied from system RAM to the
GPU's VRAM. When a CPU and GPU are colocated
(like in Apple Silicon, AMD APUs, or Intel
processors), they share a Unified Memory
Architecture (UMA). Both processors can read
and write to the exact same physical memory
pool without redundant data copying

Shared Last-Level Cache: While the L1 caches
remain separate, colocated architectures
often share a high-capacity Last-Level
Cache (L2 or L3). This allows the CPU and
GPU to quickly pass data back and forth
locally on the chip.

Bye

Zackee Mulatov schrieb:

Mild Shock wrote:

Just read something for once you alcoholic:

GPU Cache Hierarchy: Understanding L1, L2, and VRAM
https://charlesgrassi.dev/blog/gpu-cache-hierarchy/

Measuring Cache Efficiency

GPU profilers like NVIDIA Nsight, AMD Radeon GPU Profiler, and RenderDoc
expose cache hit rates and memory throughput. Key metrics to watch:

nothing. That's too located close to the same cpu, idiot. It has nothing
to do with anything. This cretin dontt undrestand what a cache is. He
thinks it's ram.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Maybe micro penis thinks if assign 50% of my
32 GB memory, i.e. 16 GB to the GPU. That
the CPU can not anymore access it?

Traditional Integrated GPUs: When you manually
carve out 16 GB for the GPU in the BIOS, you
are creating a hard software partition. The
system locks that 16 GB exclusively for the
GPU to ensure it always has video memory.
While the CPU is physically wired to those
RAM chips, the operating system's memory
manager blocks the CPU from using that 16 GB
for general applications to prevent crashes.

Modern Unified Memory:
If you are using a chip like an Apple M-series,
there is no fixed partition. The CPU and GPU share
a single pool of 32 GB. If the GPU needs 16 GB for
an AI model, it allocates it dynamically. The CPU
can still read and write to that exact same 16 GB
address space simultaneously using shared pointers,
completely eliminating the need to copy data back and forth.

Bye

Mild Shock schrieb:

Hi,

That's too located close to the same cpu, idiot.

Yes, colocating a CPU and GPU onto the same
processor die or package provides massive b
enefits, primarily by eliminating the latency
and bandwidth bottlenecks of moving data
across a motherboard.

Individual L1 Caches: Yes, the CPU cores and
the GPU compute units (Streaming Multiprocessors /
Compute Units) still maintain private,
individual L1 caches.

The "Colocation" Benefit: In traditional
setups (a separate CPU and GPU on PCIe slots),
data must be copied from system RAM to the
GPU's VRAM. When a CPU and GPU are colocated
(like in Apple Silicon, AMD APUs, or Intel
processors), they share a Unified Memory
Architecture (UMA). Both processors can read
and write to the exact same physical memory
pool without redundant data copying

Shared Last-Level Cache: While the L1 caches
remain separate, colocated architectures
often share a high-capacity Last-Level
Cache (L2 or L3). This allows the CPU and
GPU to quickly pass data back and forth
locally on the chip.

Bye

Zackee Mulatov schrieb:

Mild Shock wrote:

Just read something for once you alcoholic:

GPU Cache Hierarchy: Understanding L1, L2, and VRAM
https://charlesgrassi.dev/blog/gpu-cache-hierarchy/

Measuring Cache Efficiency

GPU profilers like NVIDIA Nsight, AMD Radeon GPU Profiler, and RenderDoc >>> expose cache hit rates and memory throughput. Key metrics to watch:

nothing. That's too located close to the same cpu, idiot. It has nothing
to do with anything. This cretin dontt undrestand what a cache is. He
thinks it's ram.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/19/2026 11:31 PM, Mild Shock wrote:

Hi,

Its actually quite amazing. Gemini, DeepSeek,
OpenAI all know Dmitriy V'jukov. I have asked
the IntelliJ integrated Freeium AI to generate

some code for me, I guess their service uses
by default OpenAI (Codex), and had it reviewed
by Gemini and DeepSeek. These AIs started lecturing

me about lazySet() in Java. But I went with set():

-a-a-a private static boolean enqueue(Queue q, Object data) {
-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
-a-a-a-a-a-a-a for (; ; ) {
-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask;
-a-a-a-a-a-a-a-a-a-a-a int seq = q.sequences.get(index);
-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.set(index, pos + 1);
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
-a-a-a-a-a-a-a-a-a-a-a } else {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a }
-a-a-a }

The above version seems to be more suitable
for my purpose, since it allows polling, it
basically implements offer(). While the

version posted on in the lock free group
by Chris M. Thomasson implements a spin wait
blocking put() already.

That had to be my bakery algo version for the bounded buffer. Now, it
can avoid the spin wait with a futex, BUT, we have to be careful.
Working with lock/wait-free algos, we need to know what we are doing. I
happen to have a lot of experience with them.

If you read my conversation with my friend, we can mix and match the CAS version and my XADD version on demand.

[...]
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

I didn't find Futex in WebGPU / WGSL.
The website WebGPU fundamentals is on
GitHub. I did a search here:

https://github.com/webgpu/webgpufundamentals

In Java I can use Doug Leas queue.
In WebGPU / WGSL I will mostlikely
adopt Dmitry Vyukov , for a first stab.

Who is Doug lea?

He wrote Concurrent Programming in
Java: Design Principles and Patterns
https://en.wikipedia.org/wiki/Doug_Lea

He is behind most of the concurrency promitives
in Java. Including the array backed queue that
I tested. Remember the results I had:

public class DmitryVyukov
8 ms
public class DougLea
10 ms

Bye

Chris M. Thomasson schrieb:

On 7/19/2026 11:31 PM, Mild Shock wrote:

Hi,

Its actually quite amazing. Gemini, DeepSeek,
OpenAI all know Dmitriy V'jukov. I have asked
the IntelliJ integrated Freeium AI to generate

some code for me, I guess their service uses
by default OpenAI (Codex), and had it reviewed
by Gemini and DeepSeek. These AIs started lecturing

me about lazySet() in Java. But I went with set():

-a-a-a-a private static boolean enqueue(Queue q, Object data) {
-a-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a for (; ; ) {
-a-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask;
-a-a-a-a-a-a-a-a-a-a-a-a int seq = q.sequences.get(index);
-a-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
-a-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.set(index, pos + 1);
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
-a-a-a-a-a-a-a-a-a-a-a-a } else {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a }
-a-a-a-a }

The above version seems to be more suitable
for my purpose, since it allows polling, it
basically implements offer(). While the

version posted on in the lock free group
by Chris M. Thomasson implements a spin wait
blocking put() already.

That had to be my bakery algo version for the bounded buffer. Now, it
can avoid the spin wait with a futex, BUT, we have to be careful.
Working with lock/wait-free algos, we need to know what we are doing. I happen to have a lot of experience with them.

If you read my conversation with my friend, we can mix and match the CAS version and my XADD version on demand.

[...]

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/20/2026 2:25 PM, Mild Shock wrote:

Hi,

I didn't find Futex in WebGPU / WGSL.
The website WebGPU fundamentals is on
GitHub. I did a search here:

https://github.com/webgpu/webgpufundamentals

In Java I can use Doug Leas queue.
In WebGPU / WGSL I will mostlikely
adopt Dmitry Vyukov , for a first stab.

Who is Doug lea?

He wrote Concurrent Programming in
Java: Design Principles and Patterns
https://en.wikipedia.org/wiki/Doug_Lea

A futex:

https://www.man7.org/linux/man-pages/man2/futex.2.html

For a compute shader? Afaict, no need for it at all. Actually, strive to
avoid any atomic RMW! It can be done, but if you really need it:

imageAtomicAdd is a damn good one for accumulation buffers.

An example from some of my compute shader code:

void add_hit(ct_plane2d plane, vec2 p, vec3 weight)
{
vec2 uv = ct_plane2d_unproject(plane, p);
ivec2 px = ivec2(uv * u_resolution);

if (px.x >= 0 && px.x < int(u_resolution.x) &&
px.y >= 0 && px.y < int(u_resolution.y))
{
imageAtomicAdd(accum_r, px, weight.r);
imageAtomicAdd(accum_g, px, weight.g);
imageAtomicAdd(accum_b, px, weight.b);
imageAtomicAdd(accum_hits, px, 1.0f);
}
}

[...]
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/20/2026 2:32 PM, Chris M. Thomasson wrote:

On 7/20/2026 2:25 PM, Mild Shock wrote:

Hi,

I didn't find Futex in WebGPU / WGSL.
The website WebGPU fundamentals is on
GitHub. I did a search here:

https://github.com/webgpu/webgpufundamentals

In Java I can use Doug Leas queue.
In WebGPU / WGSL I will mostlikely
adopt Dmitry Vyukov , for a first stab.

Who is Doug lea?

He wrote Concurrent Programming in
Java: Design Principles and Patterns
https://en.wikipedia.org/wiki/Doug_Lea

A futex:

https://www.man7.org/linux/man-pages/man2/futex.2.html

For a compute shader? Afaict, no need for it at all. Actually, strive to avoid any atomic RMW! It can be done, but if you really need it:

imageAtomicAdd is a damn good one for accumulation buffers.

An example from some of my compute shader code:

void add_hit(ct_plane2d plane, vec2 p, vec3 weight)
{
-a-a-a vec2 uv = ct_plane2d_unproject(plane, p);
-a-a-a ivec2 px = ivec2(uv * u_resolution);

-a-a-a if (px.x >= 0 && px.x < int(u_resolution.x) &&
-a-a-a-a-a-a-a px.y >= 0 && px.y < int(u_resolution.y))
-a-a-a {
-a-a-a-a-a-a-a imageAtomicAdd(accum_r,-a-a-a px, weight.r);
-a-a-a-a-a-a-a imageAtomicAdd(accum_g,-a-a-a px, weight.g);
-a-a-a-a-a-a-a imageAtomicAdd(accum_b,-a-a-a px, weight.b);
-a-a-a-a-a-a-a imageAtomicAdd(accum_hits, px, 1.0f);
-a-a-a }
}

[...]

You don't really want to "wait" for anything in a compute shader. If you
must use CAS use it as a state machine. Not a damn loop. If you can
manage it.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Hi,

I am developing agains WebGPU / WGSL.
And overview of WebGPU / WGSL is found here:

https://github.com/webgpu/webgpufundamentals

There is no imageAtomicAdd in WGSL.
imageAtomicAdd is from WebGL / GLSL.

These are two different things:

WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
WebGL / GLSL : Wrapper for OpenGL

Chris M. Thomasson schrieb:

On 7/20/2026 2:32 PM, Chris M. Thomasson wrote:

On 7/20/2026 2:25 PM, Mild Shock wrote:

Hi,

I didn't find Futex in WebGPU / WGSL.
The website WebGPU fundamentals is on
GitHub. I did a search here:

https://github.com/webgpu/webgpufundamentals

In Java I can use Doug Leas queue.
In WebGPU / WGSL I will mostlikely
adopt Dmitry Vyukov , for a first stab.

Who is Doug lea?

He wrote Concurrent Programming in
Java: Design Principles and Patterns
https://en.wikipedia.org/wiki/Doug_Lea

A futex:

https://www.man7.org/linux/man-pages/man2/futex.2.html

For a compute shader? Afaict, no need for it at all. Actually, strive
to avoid any atomic RMW! It can be done, but if you really need it:

imageAtomicAdd is a damn good one for accumulation buffers.

An example from some of my compute shader code:

void add_hit(ct_plane2d plane, vec2 p, vec3 weight)
{
-a-a-a-a vec2 uv = ct_plane2d_unproject(plane, p);
-a-a-a-a ivec2 px = ivec2(uv * u_resolution);

-a-a-a-a if (px.x >= 0 && px.x < int(u_resolution.x) &&
-a-a-a-a-a-a-a-a px.y >= 0 && px.y < int(u_resolution.y))
-a-a-a-a {
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_r,-a-a-a px, weight.r);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_g,-a-a-a px, weight.g);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_b,-a-a-a px, weight.b);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_hits, px, 1.0f);
-a-a-a-a }
}

[...]

You don't really want to "wait" for anything in a compute shader. If you must use CAS use it as a state machine. Not a damn loop. If you can
manage it.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Apple officially deprecated OpenGL and
OpenGL ES back in macOS 10.14 (Mojave) in
2018 and iOS 12, sunsetting native
support in favor of Metal.

And then in the Windows and Linux world,
for surface management, there is Wayland
Compositor. But new GPUs that share system
memory, also help here.

Open-Source Drivers (amdgpu & mesa):
Unlike NVIDIA's historical proprietary
hurdles, AMD's graphics drivers are fully
open-source and built directly into
the Linux kernel and Mesa.

Native GBM Support: AMD's driver stack
natively and cleanly implements GBM
(Generic Buffer Management) and DRM/KMS,
which is the exact standard modern
Wayland compositors (like GNOME/Mutter,
KDE/KWin, Sway, and Hyprland) rely on
to allocate buffers and manage displays.

Unified Memory (APU Advantage): Because
an AMD APU shares system RAM between
the CPU and the integrated GPU, zero-copy
buffer sharing under Wayland is
exceptionally efficient.

Bye

Mild Shock schrieb:

Hi,

Hi,

I am developing agains WebGPU / WGSL.
And overview of WebGPU / WGSL is found here:

https://github.com/webgpu/webgpufundamentals

There is no imageAtomicAdd in WGSL.
imageAtomicAdd is from WebGL / GLSL.

These are two different things:

WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
WebGL / GLSL : Wrapper for OpenGL

Chris M. Thomasson schrieb:

On 7/20/2026 2:32 PM, Chris M. Thomasson wrote:

On 7/20/2026 2:25 PM, Mild Shock wrote:

Hi,

I didn't find Futex in WebGPU / WGSL.
The website WebGPU fundamentals is on
GitHub. I did a search here:

https://github.com/webgpu/webgpufundamentals

In Java I can use Doug Leas queue.
In WebGPU / WGSL I will mostlikely
adopt Dmitry Vyukov , for a first stab.

Who is Doug lea?

He wrote Concurrent Programming in
Java: Design Principles and Patterns
https://en.wikipedia.org/wiki/Doug_Lea

A futex:

https://www.man7.org/linux/man-pages/man2/futex.2.html

For a compute shader? Afaict, no need for it at all. Actually, strive
to avoid any atomic RMW! It can be done, but if you really need it:

imageAtomicAdd is a damn good one for accumulation buffers.

An example from some of my compute shader code:

void add_hit(ct_plane2d plane, vec2 p, vec3 weight)
{
-a-a-a-a vec2 uv = ct_plane2d_unproject(plane, p);
-a-a-a-a ivec2 px = ivec2(uv * u_resolution);

-a-a-a-a if (px.x >= 0 && px.x < int(u_resolution.x) &&
-a-a-a-a-a-a-a-a px.y >= 0 && px.y < int(u_resolution.y))
-a-a-a-a {
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_r,-a-a-a px, weight.r);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_g,-a-a-a px, weight.g);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_b,-a-a-a px, weight.b);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_hits, px, 1.0f);
-a-a-a-a }
}

[...]

You don't really want to "wait" for anything in a compute shader. If
you must use CAS use it as a state machine. Not a damn loop. If you
can manage it.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Shared Last-Level Cache: While the L1 caches remain separate, colocated architectures often share a high-capacity Last-Level Cache (L2 or L3).
This allows the CPU and GPU to quickly pass data back and forth locally
on the chip.

this guy is a total failure in computing; the point is the gpu to do it's
job without cpu intervention. That's why the name, gpu. The cpu is for
other things
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

You guys are not paying attention. GPU is 10x
more performant than CPU for certain integerish
payload on the pi-WAM. 11.4 GLips on a GPU is

ca 10x more than 1.7 GLips on a CPU:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

Parallel -C-WAM: 1.7 Giga Lips on a CPU
https://medium.com/2989/8a984e75af44

So GPUs are by way not dead. Especially since
they can be accessed via WebGPU / WGSL. But
the line between GPU and CPU increasingly

blurrs. It already happens for APUs in
that unified memory puts them into the same
RAM space. But the programming means differ.

Also unified memory doesn't mean that
the GPU sees memory the same way as a CPU.
To get a taste how a GPU sees memory:

Memory Model
Execution Barriers
Fence and Address Spaces
Memory Model GFX6-GFX9
Memory Model GFX90A
Memory Model GFX942
Memory Model GFX10-GFX11
Memory Model GFX12
Memory Model GFX125x

https://llvm.org/docs/AMDGPUUsage.html

WebGPU / WGSL seems to have good support,
since it can have Vulkan, Direct 12, or Metal
as GPU low level interface. Maybe more

platforms, something NVIDIA I guess. But I
don't know the details, how this is all done.

Bye

Mild Shock schrieb:

Hi,

If you don't know how GPU caches work.
Just RTFM the RDNA 3.5 specs! They have
some explanations in the docs, what jobs

the GPU cache lines do, in relation to
what instructions:

Abbreviation for rCyRead The Fucking ManualrCO. http://www.catb.org/esr/jargon/html/R/RTFM.html

Here some RDNA 4.0 specs (smaller GPUs):

"RDNA4" Instruction Set Architecture
Reference Guide - 7-April-2025 https://docs.amd.com/v/u/en-US/rdna4-instruction-set-architecture

Here some CDNA 4.0 specs (bigger GPUs):

CDNA4 Instruction Set Architecture
Reference Guide - 5-August-2025 https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/amd-instinct-cdna4-instruction-set-architecture.pdf

Bye

But the difference between CDNA GPUs and
RDNA GPUs seems not to be that big, at least
in 2025:

Commitment to High-Performance
Computing in the Age of AI https://docs.amd.com/v/u/en-US/precision-at-scale-amd-whitepaper

While the Copilot+ threshold is 45 TFLOPs,
a MI355X, Datacenter, rack-mounted, liquid cooling,
has surely more memory, but only 157 TFLOPS.

And RTX 5090, Desktop, 600W+ TDP, massive cooling,
has also only 100 TFLOPS. So it looks these
Copilot+ AI Laptops are pretty swell, arent they?

Mild Shock schrieb:

Hi,

completely nonsense. Not even correct grammatically

Yes of course, Micro Penis will know. Nothing, LoL
But here we find how village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core
topology are "embedded cpu registers area,
it has nothing to do with the ram." That is
a brilliant piece of hardware fiction.

Caches are SRAM acting as a hierarchical
staging ground for and backed by system
or device RAM, not an alternate dimension
divorced from memory entirely.

And calling cache hierarchies "registers"
is like confusing a warehouse parking lot
with the glove compartment of a single car.
Never heard of the crossbar in AMD GPUs?

LoL

Bye

Obelin Baisaroff schrieb:

Ross Finlayson wrote:

access to memory, has that these days with
L1/L2/L3 caches and the proximity and affinity
in the topology of the cores and

those are embedded cpu registers area, it has
nothing to do with the ram. Works by higher
clocks compared, but merely useless in AI.

Romelio Balakhonsky schrieb:

Mild Shock wrote:

me about lazySet() in Java. But I went with set():

-a-a-a-a-a private static boolean enqueue(Queue q, Object data) {
-a-a-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a for (; ; ) {
-a-a-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask; int seq =
-a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.get(index);
-a-a-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
-a-a-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data; q.sequences.set(index,
pos +
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a 1);
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
-a-a-a-a-a-a-a-a-a-a-a-a-a } else {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a }

The above version seems to be more suitable for my purpose, since it
allows polling, it basically implements offer(). While the

completely nonsense. Not even correct grammatically

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Concerning programmig means of GPUs,
"CUDA edge" refers to the massive competitive
advantage NVIDIA holds in artificial intelligence
due to its proprietary parallel computing platform,
CUDA (Compute Unified Device Architecture).

WebGPU and WGSL (WebGPU Shading Language)
represent a massive shift in AI because they
bring high-performance hardware acceleration
directly to the web browser without relying
on proprietary ecosystems like CUDA.

Developed by the W3C GPU for the Web
Community Group, this standard allows web
applications to interact directly with native
graphics APIs like Microsoft DirectX 12,
Apple Metal, and Vulkan

Bye

Some WebGPU show cases:

Frameworks like WebLLM leverage WebGPU to
run large language models locally inside
browsers like Google Chrome, providing
completely private, offline AI assistants.

Developers use libraries like Hugging Face
Transformers.js v3 to run computer vision,
speech recognition, and natural language
processing tasks directly on consumer
laptops and smartphones.

Mild Shock schrieb:

Hi,

You guys are not paying attention. GPU is 10x
more performant than CPU for certain integerish
payload on the pi-WAM. 11.4 GLips on a GPU is

ca 10x more than 1.7 GLips on a CPU:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

Parallel -C-WAM: 1.7 Giga Lips on a CPU
https://medium.com/2989/8a984e75af44

So GPUs are by way not dead. Especially since
they can be accessed via WebGPU / WGSL. But
the line between GPU and CPU increasingly

blurrs. It already happens for APUs in
that unified memory puts them into the same
RAM space. But the programming means differ.

Also unified memory doesn't mean that
the GPU sees memory the same way as a CPU.
To get a taste how a GPU sees memory:

Memory Model
-a-a-a Execution Barriers
-a-a-a Fence and Address Spaces
-a-a-a Memory Model GFX6-GFX9
-a-a-a Memory Model GFX90A
-a-a-a Memory Model GFX942
-a-a-a Memory Model GFX10-GFX11
-a-a-a Memory Model GFX12
-a-a-a Memory Model GFX125x

https://llvm.org/docs/AMDGPUUsage.html

WebGPU / WGSL seems to have good support,
since it can have Vulkan, Direct 12, or Metal
as GPU low level interface. Maybe more

platforms, something NVIDIA I guess. But I
don't know the details, how this is all done.

Bye

Mild Shock schrieb:

Hi,

If you don't know how GPU caches work.
Just RTFM the RDNA 3.5 specs! They have
some explanations in the docs, what jobs

the GPU cache lines do, in relation to
what instructions:

Abbreviation for rCyRead The Fucking ManualrCO.
http://www.catb.org/esr/jargon/html/R/RTFM.html

Here some RDNA 4.0 specs (smaller GPUs):

"RDNA4" Instruction Set Architecture
Reference Guide - 7-April-2025
https://docs.amd.com/v/u/en-US/rdna4-instruction-set-architecture

Here some CDNA 4.0 specs (bigger GPUs):

CDNA4 Instruction Set Architecture
Reference Guide - 5-August-2025
https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/amd-instinct-cdna4-instruction-set-architecture.pdf


Bye

But the difference between CDNA GPUs and
RDNA GPUs seems not to be that big, at least
in 2025:

Commitment to High-Performance
Computing in the Age of AI
https://docs.amd.com/v/u/en-US/precision-at-scale-amd-whitepaper

While the Copilot+ threshold is 45 TFLOPs,
a MI355X, Datacenter, rack-mounted, liquid cooling,
has surely more memory, but only 157 TFLOPS.

And RTX 5090, Desktop, 600W+ TDP, massive cooling,
has also only 100 TFLOPS. So it looks these
Copilot+ AI Laptops are pretty swell, arent they?

Mild Shock schrieb:

Hi,

completely nonsense. Not even correct grammatically

Yes of course, Micro Penis will know. Nothing, LoL
But here we find how village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core
topology are "embedded cpu registers area,
it has nothing to do with the ram." That is
a brilliant piece of hardware fiction.

Caches are SRAM acting as a hierarchical
staging ground for and backed by system
or device RAM, not an alternate dimension
divorced from memory entirely.

And calling cache hierarchies "registers"
is like confusing a warehouse parking lot
with the glove compartment of a single car.
Never heard of the crossbar in AMD GPUs?

LoL

Bye

Obelin Baisaroff schrieb:

Ross Finlayson wrote:

access to memory, has that these days with
L1/L2/L3 caches and the proximity and affinity
in the topology of the cores and

those are embedded cpu registers area, it has
nothing to do with the ram. Works by higher
clocks compared, but merely useless in AI.

Romelio Balakhonsky schrieb:

Mild Shock wrote:

me about lazySet() in Java. But I went with set():

-a-a-a-a-a private static boolean enqueue(Queue q, Object data) {
-a-a-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a for (; ; ) {
-a-a-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask; int seq = >>>>> -a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.get(index);
-a-a-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
-a-a-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data; q.sequences.set(index,
pos +
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a 1);
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
-a-a-a-a-a-a-a-a-a-a-a-a-a } else {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a }

The above version seems to be more suitable for my purpose, since it >>>>> allows polling, it basically implements offer(). While the

completely nonsense. Not even correct grammatically

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

I didn't try yet escaping the browser with
WebGPU / WGSL. Only did inside the last 24 hour
another experiment, escaping Workers from the

browser. And found that I can easily use
Workers in node.js. But the story goes
that WebGPU / WGSL could be quite attractive,

across UX and non-UX, i.e. headless:

"Like WebAssembly before it, WebGPU has "escaped"
the browser. WebAssembly began as a browser
technology but quickly grew into a universal runtime
with standalone engines like Wasmtime and Wasmer.

WebGPU appears to follow the same path. With
bindings for Node.js, Deno, C++, and Rust
engines like Bevy [6], developers can already
run WebGPU workloads outside the browser.

This positions WebGPU not just as a graphics
API, but as a long-term portability layer for
GPU compute and rendering across ecosystems."

https://blog.4dpipeline.com/client-side-ai-is-here-how-webgpu-transforms-your-gpu-server-economics

Bye

Mild Shock schrieb:

Hi,

Concerning programmig means of GPUs,
"CUDA edge" refers to the massive competitive
advantage NVIDIA holds in artificial intelligence
due to its proprietary parallel computing platform,
CUDA (Compute Unified Device Architecture).

WebGPU and WGSL (WebGPU Shading Language)
represent a massive shift in AI because they
bring high-performance hardware acceleration
directly to the web browser without relying
on proprietary ecosystems like CUDA.

Developed by the W3C GPU for the Web
Community Group, this standard allows web
applications to interact directly with native
graphics APIs like Microsoft DirectX 12,
Apple Metal, and Vulkan

Bye

Some WebGPU show cases:

Frameworks like WebLLM leverage WebGPU to
run large language models locally inside
browsers like Google Chrome, providing
completely private, offline AI assistants.

Developers use libraries like Hugging Face
Transformers.js v3 to run computer vision,
speech recognition, and natural language
processing tasks directly on consumer
laptops and smartphones.

Mild Shock schrieb:

Hi,

You guys are not paying attention. GPU is 10x
more performant than CPU for certain integerish
payload on the pi-WAM. 11.4 GLips on a GPU is

ca 10x more than 1.7 GLips on a CPU:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Parallel -C-WAM: 1.7 Giga Lips on a CPU
https://medium.com/2989/8a984e75af44

So GPUs are by way not dead. Especially since
they can be accessed via WebGPU / WGSL. But
the line between GPU and CPU increasingly

blurrs. It already happens for APUs in
that unified memory puts them into the same
RAM space. But the programming means differ.

Also unified memory doesn't mean that
the GPU sees memory the same way as a CPU.
To get a taste how a GPU sees memory:

Memory Model
-a-a-a-a Execution Barriers
-a-a-a-a Fence and Address Spaces
-a-a-a-a Memory Model GFX6-GFX9
-a-a-a-a Memory Model GFX90A
-a-a-a-a Memory Model GFX942
-a-a-a-a Memory Model GFX10-GFX11
-a-a-a-a Memory Model GFX12
-a-a-a-a Memory Model GFX125x

https://llvm.org/docs/AMDGPUUsage.html

WebGPU / WGSL seems to have good support,
since it can have Vulkan, Direct 12, or Metal
as GPU low level interface. Maybe more

platforms, something NVIDIA I guess. But I
don't know the details, how this is all done.

Bye

Mild Shock schrieb:

Hi,

If you don't know how GPU caches work.
Just RTFM the RDNA 3.5 specs! They have
some explanations in the docs, what jobs

the GPU cache lines do, in relation to
what instructions:

Abbreviation for rCyRead The Fucking ManualrCO.
http://www.catb.org/esr/jargon/html/R/RTFM.html

Here some RDNA 4.0 specs (smaller GPUs):

"RDNA4" Instruction Set Architecture
Reference Guide - 7-April-2025
https://docs.amd.com/v/u/en-US/rdna4-instruction-set-architecture

Here some CDNA 4.0 specs (bigger GPUs):

CDNA4 Instruction Set Architecture
Reference Guide - 5-August-2025
https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/amd-instinct-cdna4-instruction-set-architecture.pdf


Bye

But the difference between CDNA GPUs and
RDNA GPUs seems not to be that big, at least
in 2025:

Commitment to High-Performance
Computing in the Age of AI
https://docs.amd.com/v/u/en-US/precision-at-scale-amd-whitepaper

While the Copilot+ threshold is 45 TFLOPs,
a MI355X, Datacenter, rack-mounted, liquid cooling,
has surely more memory, but only 157 TFLOPS.

And RTX 5090, Desktop, 600W+ TDP, massive cooling,
has also only 100 TFLOPS. So it looks these
Copilot+ AI Laptops are pretty swell, arent they?

Mild Shock schrieb:

Hi,

completely nonsense. Not even correct grammatically

Yes of course, Micro Penis will know. Nothing, LoL
But here we find how village idiot Micro Penis is.
The Cache Identity Crisis by Micro Penis:

Claiming that L1/L2/L3 caches and core
topology are "embedded cpu registers area,
it has nothing to do with the ram." That is
a brilliant piece of hardware fiction.

Caches are SRAM acting as a hierarchical
staging ground for and backed by system
or device RAM, not an alternate dimension
divorced from memory entirely.

And calling cache hierarchies "registers"
is like confusing a warehouse parking lot
with the glove compartment of a single car.
Never heard of the crossbar in AMD GPUs?

LoL

Bye

Obelin Baisaroff schrieb:

Ross Finlayson wrote:

access to memory, has that these days with
L1/L2/L3 caches and the proximity and affinity
in the topology of the cores and

those are embedded cpu registers area, it has
nothing to do with the ram. Works by higher
clocks compared, but merely useless in AI.

Romelio Balakhonsky schrieb:

Mild Shock wrote:

me about lazySet() in Java. But I went with set():

-a-a-a-a-a private static boolean enqueue(Queue q, Object data) {
-a-a-a-a-a-a-a-a-a int pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a for (; ; ) {
-a-a-a-a-a-a-a-a-a-a-a-a-a int index = pos & q.bufferMask; int seq = >>>>>> -a-a-a-a-a-a-a-a-a-a-a-a-a q.sequences.get(index);
-a-a-a-a-a-a-a-a-a-a-a-a-a int dif = seq - pos;
-a-a-a-a-a-a-a-a-a-a-a-a-a if (dif == 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a q.data[index] = data; q.sequences.set(index,
pos +
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a 1);
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return true;
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a } else if (dif < 0) {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a return false;
-a-a-a-a-a-a-a-a-a-a-a-a-a } else {
-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a-a pos = q.enqueuePos.get();
-a-a-a-a-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a-a-a-a-a }
-a-a-a-a-a }

The above version seems to be more suitable for my purpose, since it >>>>>> allows polling, it basically implements offer(). While the

completely nonsense. Not even correct grammatically

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/20/2026 3:12 PM, Mild Shock wrote:

Hi,

Hi,

I am developing agains WebGPU / WGSL.
And overview of WebGPU / WGSL is found here:

https://github.com/webgpu/webgpufundamentals

There is no imageAtomicAdd in WGSL.
imageAtomicAdd is from WebGL / GLSL.

These are two different things:

WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
WebGL / GLSL : Wrapper for OpenGL

Chris M. Thomasson schrieb:

On 7/20/2026 2:32 PM, Chris M. Thomasson wrote:

On 7/20/2026 2:25 PM, Mild Shock wrote:

Hi,

I didn't find Futex in WebGPU / WGSL.
The website WebGPU fundamentals is on
GitHub. I did a search here:

https://github.com/webgpu/webgpufundamentals

In Java I can use Doug Leas queue.
In WebGPU / WGSL I will mostlikely
adopt Dmitry Vyukov , for a first stab.

Who is Doug lea?

He wrote Concurrent Programming in
Java: Design Principles and Patterns
https://en.wikipedia.org/wiki/Doug_Lea

A futex:

https://www.man7.org/linux/man-pages/man2/futex.2.html

For a compute shader? Afaict, no need for it at all. Actually, strive
to avoid any atomic RMW! It can be done, but if you really need it:

imageAtomicAdd is a damn good one for accumulation buffers.

An example from some of my compute shader code:

void add_hit(ct_plane2d plane, vec2 p, vec3 weight)
{
-a-a-a-a vec2 uv = ct_plane2d_unproject(plane, p);
-a-a-a-a ivec2 px = ivec2(uv * u_resolution);

-a-a-a-a if (px.x >= 0 && px.x < int(u_resolution.x) &&
-a-a-a-a-a-a-a-a px.y >= 0 && px.y < int(u_resolution.y))
-a-a-a-a {
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_r,-a-a-a px, weight.r);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_g,-a-a-a px, weight.g);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_b,-a-a-a px, weight.b);
-a-a-a-a-a-a-a-a imageAtomicAdd(accum_hits, px, 1.0f);
-a-a-a-a }
}

[...]

You don't really want to "wait" for anything in a compute shader. If
you must use CAS use it as a state machine. Not a damn loop. If you
can manage it.

WebGL has compute shaders, right? So, imageAtomicAdd works.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

But I am nowhere using WebGL / GLSL.
The experiment here GPU versus CPU,
was done with WebGPU / WGSL:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

Parallel -C-WAM: 1.7 Giga Lips on a CPU
https://medium.com/2989/8a984e75af44

I do not intend to redo the experiment
"gigabudget" with WebGL / GSLS. It would
appear to me like flogging a dead horse,

a technology that has reached EOL, namely
OpenGL which is in the phase of end of lifetime.

Bye

Chris M. Thomasson schrieb:

WebGL has compute shaders, right? So, imageAtomicAdd works.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers. I already
did imageAtomicAdd, in an experiment,

where pi-WAM implemented an in and out
buffer as follows in Java, which can
be trivially ported to WebGPU / WGSL,

by using atomic(i32) and AtomicAdd:

private static final class PiChan {
private int[] buf;
private AtomicInteger pos;
}

private static final class PiWam {
private PiChan in;
Etc...
}

case 5: /* in */
int at = pi.in.pos.getAndAdd(obj);
for (int i = 0; i < obj; i++)
pi.state[offset + i] = pi.in.buf[at + i];
return 0;

But this is not the same like Dmitry
Vyukov buffer. Which has a maximum
capacity, and fails to go beyond this

capacity filling a buffer by a producer,
before a consumer made the buffer not
full again. My requirement for pi-WAM

are bounded buffers with a finite capacity.

Bye

Mild Shock schrieb:

Hi,

But I am nowhere using WebGL / GLSL.
The experiment here GPU versus CPU,
was done with WebGPU / WGSL:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

Parallel -C-WAM: 1.7 Giga Lips on a CPU
https://medium.com/2989/8a984e75af44

I do not intend to redo the experiment
"gigabudget" with WebGL / GSLS. It would
appear to me like flogging a dead horse,

a technology that has reached EOL, namely
OpenGL which is in the phase of end of lifetime.

Bye

Chris M. Thomasson schrieb:

WebGL has compute shaders, right? So, imageAtomicAdd works.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

I am still singing this song:

"I'm a spinner, I'm a sinner
I spin on CAS loops for my dinner
Some call it busy-wait, I call it fate
When the queue is empty, I just rotate"

In Dmitry Vyukov multiple producer and
multiple consuer, the assumption is
that the capacity is a multiple power

of 2. This way some inveriants hold
computing seq - pos, even of the i32
arithmetc overflows, the difference

will still be in the interval -capacity
... capacity , as the AI chat bot explained
me. The initialization of a Dmitry Vyukov

then doesn't store capacity itself, but
a mask derived from capacity:

private static void init(Queue q, int size) {
q.bufferMask = size - 1;
q.sequences = new AtomicIntegerArray(size);
for (int i = 0; i < size; i++)
q.sequences.set(i, i);
q.data = new Object[size];
q.enqueuePos = new AtomicInteger(0);
q.dequeuePos = new AtomicInteger(0);
}

I cannot use imageAtomicAdd, which wouldn't
have a finite capacity. But as you see
I have already a prototype of a Queue

with a finite capacity. And the results
for a systolic system are quite good:

public class DmitryVyukov
8 ms
public class DougLea
10 ms

Have Fun!

Bye

Mild Shock schrieb:

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers. I already
did imageAtomicAdd, in an experiment,

where pi-WAM implemented an in and out
buffer as follows in Java, which can
be trivially ported to WebGPU / WGSL,

by using atomic(i32) and AtomicAdd:

-a-a private static final class PiChan {
-a-a-a-a-a-a-a private int[] buf;
-a-a-a-a-a-a-a private AtomicInteger pos;
-a-a-a }

-a-a-a private static final class PiWam {
-a-a-a-a-a-a-a private PiChan in;
-a-a-a-aEtc...
-a-a-a }

-a-a case 5: /* in */
-a-a-a-a-a-a-a int at = pi.in.pos.getAndAdd(obj);
-a-a-a-a-a-a-a for (int i = 0; i < obj; i++)
-a-a-a-a-a-a-a-a-a-a-a-a pi.state[offset + i] = pi.in.buf[at + i];
-a-a-a-a-a-a-a return 0;

But this is not the same like Dmitry
Vyukov buffer. Which has a maximum
capacity, and fails to go beyond this

capacity filling a buffer by a producer,
before a consumer made the buffer not
full again. My requirement for pi-WAM

are bounded buffers with a finite capacity.

Bye

Mild Shock schrieb:

Hi,

But I am nowhere using WebGL / GLSL.
The experiment here GPU versus CPU,
was done with WebGPU / WGSL:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Parallel -C-WAM: 1.7 Giga Lips on a CPU
https://medium.com/2989/8a984e75af44

I do not intend to redo the experiment
"gigabudget" with WebGL / GSLS. It would
appear to me like flogging a dead horse,

a technology that has reached EOL, namely
OpenGL which is in the phase of end of lifetime.

Bye

Chris M. Thomasson schrieb:

WebGL has compute shaders, right? So, imageAtomicAdd works.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math


private static final int WORK = 8192;
private static final int NECK = 128;

private static void producer(Queue q) {
for (int i = 0; i < WORK; i++) {
Integer val = Integer.valueOf(i);
while (!enqueue(q, val)) ;
}
}

private static void consumer(Queue q) {
for (;;) {
Integer val;
while ((val = (Integer) dequeue(q)) == null) ;
if (val.intValue() == WORK-1)
break;
}
}

public static void main(String[] args) throws InterruptedException {
Queue q = new Queue();
init(q, NECK);
long tms = System.currentTimeMillis();
Thread[] threads = new Thread[4];
for (int i = 0; i < 4; i++) {
Thread thread;
if (i < 2) {
thread = new Thread(() -> producer(q));
} else {
thread = new Thread(() -> consumer(q));
}
threads[i] = thread;
thread.start();
}
for (int i = 0; i < 4; i++) {
Thread thread = threads[i];
thread.join();
}
System.out.println((System.currentTimeMillis() - tms)+" ms");
}



Mild Shock schrieb:

Hi,

I am still singing this song:

"I'm a spinner, I'm a sinner
I spin on CAS loops for my dinner
Some call it busy-wait, I call it fate
When the queue is empty, I just rotate"

In Dmitry Vyukov multiple producer and
multiple consuer, the assumption is
that the capacity is a multiple power

of 2. This way some inveriants hold
computing seq - pos, even of the i32
arithmetc overflows, the difference

will still be in the interval -capacity
... capacity , as the AI chat bot explained
me. The initialization of a Dmitry Vyukov

then doesn't store capacity itself, but
a mask derived from capacity:

-a-a-a private static void init(Queue q, int size) {
-a-a-a-a-a-a-a q.bufferMask = size - 1;
-a-a-a-a-a-a-a q.sequences = new AtomicIntegerArray(size);
-a-a-a-a-a-a-a for (int i = 0; i < size; i++)
-a-a-a-a-a-a-a-a-a-a-a q.sequences.set(i, i);
-a-a-a-a-a-a-a q.data = new Object[size];
-a-a-a-a-a-a-a q.enqueuePos = new AtomicInteger(0);
-a-a-a-a-a-a-a q.dequeuePos = new AtomicInteger(0);
-a-a-a }

I cannot use imageAtomicAdd, which wouldn't
have a finite capacity. But as you see
I have already a prototype of a Queue

with a finite capacity. And the results
for a systolic system are quite good:

public class DmitryVyukov
8 ms
public class DougLea
10 ms

Have Fun!

Bye

Mild Shock schrieb:

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers. I already
did imageAtomicAdd, in an experiment,

where pi-WAM implemented an in and out
buffer as follows in Java, which can
be trivially ported to WebGPU / WGSL,

by using atomic(i32) and AtomicAdd:

-a-a-a private static final class PiChan {
-a-a-a-a-a-a-a-a private int[] buf;
-a-a-a-a-a-a-a-a private AtomicInteger pos;
-a-a-a-a }

-a-a-a-a private static final class PiWam {
-a-a-a-a-a-a-a-a private PiChan in;
-a-a-a-a-aEtc...
-a-a-a-a }

-a-a-a case 5: /* in */
-a-a-a-a-a-a-a-a int at = pi.in.pos.getAndAdd(obj);
-a-a-a-a-a-a-a-a for (int i = 0; i < obj; i++)
-a-a-a-a-a-a-a-a-a-a-a-a-a pi.state[offset + i] = pi.in.buf[at + i];
-a-a-a-a-a-a-a-a return 0;

But this is not the same like Dmitry
Vyukov buffer. Which has a maximum
capacity, and fails to go beyond this

capacity filling a buffer by a producer,
before a consumer made the buffer not
full again. My requirement for pi-WAM

are bounded buffers with a finite capacity.

Bye

Mild Shock schrieb:

Hi,

But I am nowhere using WebGL / GLSL.
The experiment here GPU versus CPU,
was done with WebGPU / WGSL:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Parallel -C-WAM: 1.7 Giga Lips on a CPU
https://medium.com/2989/8a984e75af44

I do not intend to redo the experiment
"gigabudget" with WebGL / GSLS. It would
appear to me like flogging a dead horse,

a technology that has reached EOL, namely
OpenGL which is in the phase of end of lifetime.

Bye

Chris M. Thomasson schrieb:

WebGL has compute shaders, right? So, imageAtomicAdd works.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/20/2026 4:32 PM, Mild Shock wrote:

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers.

[...]

Are you sure about that! ;^o
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

I went to holdays in June 2026, had an idea for
a pi-WAM based on a Hack, the later is described here:

Emulating -C-WAM in Dogelog Player
https://medium.com/2989/de9cd29c7d37

The Elements of Computing Systems
https://mitpress.mit.edu/9780262539807

In July 2026 I did the CPU and GPU experiments,
moving from emulator to native executor based in
realizing Hack as a concrete virtual machine,

and not as an abstract machine emulated in Prolog.
The GPU experiments were done in WebGPU / WGSL.
So no, I never used OpenGL Version 4.2 and later.

Also the name imageAtomicAdd indicates that
imageAtomicAdd is rather from a render shader,
while my GPU experiment uses a compute shader.

Especially I need GPU compute shaders, which
are not executed in lock step, but rather have
indepdendent thread state, also known as MIMD.

"In computing, multiple instruction, multiple
data (MIMD) is a technique employed to
achieve parallelism. " https://en.wikipedia.org/wiki/Multiple_instruction,_multiple_data

MIMID showed up 2017 with NVIDIA Volta cards.
But is now realized by Intel Arc, Snapdragon Adreno,
AMD RDNA and Apple Silicon as well.

Bye

Chris M. Thomasson schrieb:

On 7/20/2026 4:32 PM, Mild Shock wrote:

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers.

[...]

Are you sure about that! ;^o

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Because of MIMD you have to reassess algorithms.
A spin loop which could really hurt non-MIMD
GPUs, might less hurt a MIMD GPU.

Basically you have to reassess algorithms. Be
very exact whether your claims relates to
non-MIMD or to MIMD. You can toy around

with WebGL, mainly made for non-MIMD, here:

https://www.shadertoy.com/

and with WegGPU, mainly made for MIMD, here:

https://compute.toys/

The compute toys page, supports two shader
languages, WGSL and Slang. I made my GPU
experiments only with WGSL.

So I don't know Slang either. Things I
don't know in the GPU world are:

- OpenGL 4.2 and later
- Slang https://shader-slang.org/

Things I have meanwhile hands on, and which
I plan to integrate into library(edge/brainfog):

- WGSL https://webgpufundamentals.org/

Bye

Mild Shock schrieb:

Hi,

I went to holdays in June 2026, had an idea for
a pi-WAM based on a Hack, the later is described here:

Emulating -C-WAM in Dogelog Player
https://medium.com/2989/de9cd29c7d37

The Elements of Computing Systems
https://mitpress.mit.edu/9780262539807

In July 2026 I did the CPU and GPU experiments,
moving from emulator to native executor based in
realizing Hack as a concrete virtual machine,

and not as an abstract machine emulated in Prolog.
The GPU experiments were done in WebGPU / WGSL.
So no, I never used OpenGL Version 4.2 and later.

Also the name imageAtomicAdd indicates that
imageAtomicAdd is rather from a render shader,
while my GPU experiment uses a compute shader.

Especially I need GPU compute shaders, which
are not executed in lock step, but rather have
indepdendent thread state, also known as MIMD.

"In computing, multiple instruction, multiple
data (MIMD) is a technique employed to
achieve parallelism. " https://en.wikipedia.org/wiki/Multiple_instruction,_multiple_data

MIMID showed up 2017 with NVIDIA Volta cards.
But is now realized by Intel Arc, Snapdragon Adreno,
AMD RDNA and Apple Silicon as well.

Bye

Chris M. Thomasson schrieb:

On 7/20/2026 4:32 PM, Mild Shock wrote:

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers.

[...]

Are you sure about that! ;^o

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Since pi-WAM has two ancestors, namely pi for
pi-calculus and WAM for Warren Abstract Machine,
MIMD is especially interesting for pi-WAM .

To realize some pi-calculus fragment for example
Hoare Communicating Sequential Processes (CSP),
I will not use ADA rendez vous, but are planning

"In computer science, communicating sequential
processes (CSP) is a formal language for
describing patterns of interaction in concurrent systems

CSP was first described by Tony Hoare in a 1978 article
CSP has been practically applied in industry as a
tool for specifying and verifying the concurrent

aspects of a variety of different systems,
such as the T9000 Transputer" https://en.wikipedia.org/wiki/Communicating_sequential_processes

to use queue. Especially bounded MPMC queues, queues
with a finite capacity that allow multiple producers
and multiple consumers. And here MIMD seems to be

brother in spirit. Just think of pi-WAM being a transputer:

"An important purpose of the feature is
to enable reliable use of programming models
such as producer-consumer within a warp"
https://stackoverflow.com/q/70987051

Will see! I do not expect Micro Penis, Ross Finlayson,
Kim Horsel, or Chris M. Thomasson be helpful in
any way. They rather represent the wall of ignorance

or misunderstanding that such a project as pi-WAM can
face, very naturally. So take my posts as Turing Tests,
to see how much brain USENETS morons have, it also

helps me doing my laboratory hygien, by doing
brainwriting. Although recently it gets a little
annoying, since I am meanwhile repeating for the

5-th time what I already wrote weeks ago.

Bye
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 07/21/2026 12:16 AM, Mild Shock wrote:

Hi,

Since pi-WAM has two ancestors, namely pi for
pi-calculus and WAM for Warren Abstract Machine,
MIMD is especially interesting for pi-WAM .

To realize some pi-calculus fragment for example
Hoare Communicating Sequential Processes (CSP),
I will not use ADA rendez vous, but are planning

"In computer science, communicating sequential
processes (CSP) is a formal language for
describing patterns of interaction in concurrent systems

CSP was first described by Tony Hoare in a 1978 article
CSP has been practically applied in industry as a
tool for specifying and verifying the concurrent

aspects of a variety of different systems,
such as the T9000 Transputer" https://en.wikipedia.org/wiki/Communicating_sequential_processes

to use queue. Especially bounded MPMC queues, queues
with a finite capacity that allow multiple producers
and multiple consumers. And here MIMD seems to be

brother in spirit. Just think of pi-WAM being a transputer:

"An important purpose of the feature is
to enable reliable use of programming models
such as producer-consumer within a warp"
https://stackoverflow.com/q/70987051

Will see! I do not expect Micro Penis, Ross Finlayson,
Kim Horsel, or Chris M. Thomasson be helpful in
any way. They rather represent the wall of ignorance

or misunderstanding that such a project as pi-WAM can
face, very naturally. So take my posts as Turing Tests,
to see how much brain USENETS morons have, it also

helps me doing my laboratory hygien, by doing
brainwriting. Although recently it gets a little
annoying, since I am meanwhile repeating for the

5-th time what I already wrote weeks ago.

Bye

(Megalomania)


What it is is _irrelevant_ to sci.physics.relativity.


Burse's latest bot: "P.O. on stims".


Everybody here already heard of communicating sequential processes,
the pi-calculus, and since when IBM "solved" it, then "streaming
and batching" is old OLTP wrapped-as-new.


Why not MIMD-on-SIMD and SIMD with SWAR?


Bonkers



--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 07/20/2026 11:59 PM, Mild Shock wrote:

Hi,

Because of MIMD you have to reassess algorithms.
A spin loop which could really hurt non-MIMD
GPUs, might less hurt a MIMD GPU.

Basically you have to reassess algorithms. Be
very exact whether your claims relates to
non-MIMD or to MIMD. You can toy around

with WebGL, mainly made for non-MIMD, here:

https://www.shadertoy.com/

and with WegGPU, mainly made for MIMD, here:

https://compute.toys/

The compute toys page, supports two shader
languages, WGSL and Slang. I made my GPU
experiments only with WGSL.

So I don't know Slang either. Things I
don't know in the GPU world are:

- OpenGL 4.2 and later
- Slang https://shader-slang.org/

Things I have meanwhile hands on, and which
I plan to integrate into library(edge/brainfog):

- WGSL https://webgpufundamentals.org/

Bye

Mild Shock schrieb:

Hi,

I went to holdays in June 2026, had an idea for
a pi-WAM based on a Hack, the later is described here:

Emulating -C-WAM in Dogelog Player
https://medium.com/2989/de9cd29c7d37

The Elements of Computing Systems
https://mitpress.mit.edu/9780262539807

In July 2026 I did the CPU and GPU experiments,
moving from emulator to native executor based in
realizing Hack as a concrete virtual machine,

and not as an abstract machine emulated in Prolog.
The GPU experiments were done in WebGPU / WGSL.
So no, I never used OpenGL Version 4.2 and later.

Also the name imageAtomicAdd indicates that
imageAtomicAdd is rather from a render shader,
while my GPU experiment uses a compute shader.

Especially I need GPU compute shaders, which
are not executed in lock step, but rather have
indepdendent thread state, also known as MIMD.

"In computing, multiple instruction, multiple
data (MIMD) is a technique employed to
achieve parallelism. "
https://en.wikipedia.org/wiki/Multiple_instruction,_multiple_data

MIMID showed up 2017 with NVIDIA Volta cards.
But is now realized by Intel Arc, Snapdragon Adreno,
AMD RDNA and Apple Silicon as well.

Bye

Chris M. Thomasson schrieb:

On 7/20/2026 4:32 PM, Mild Shock wrote:

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers.

[...]

Are you sure about that! ;^o

How about Silicon Grid Engine and MPI, OpenMP and old cluster.


Or old "batch jobs".

Batch jobs: it's how work gets done.



You crazy frothing lunatic



--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Rossy Boy is slower than Micro Penis.
Both being heavy alcoholic. Both don't
understand the "budget" here:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

Budget means , I don't use a Mainframe
with a Job Control language. Budget means
ca. 1000 USD for the AI Laptops (Yoga, Ryzen

and Think) I bought end of 2025, and ca. 500
USD for the AI Laptop (Mac Neo) I bought
middle of 2026. I explained that already to

the Micro Penis moron. Now I explain it
again to the Rossy Boy herpes blister
corona victim.

Bye

Ross Finlayson schrieb:

How about Silicon Grid Engine and MPI, OpenMP and old cluster.

Or old "batch jobs".

Batch jobs:-a it's how work gets done.

You crazy frothing lunatic

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

But please go on Rossy Boy, ask more stupid
questions, that I have already answered in
relation to Micro Penis.

I am happy to repeat, what I already have
posted, again and again. If necesssary I
will repeat the well known material,

that everybody can find on the internet,
again like 1000x times. I have no problem with
that providing this information again and

again, as long as stupid questions are asked.

Bye

Mild Shock schrieb:

Hi,

Rossy Boy is slower than Micro Penis.
Both being heavy alcoholic. Both don't
understand the "budget" here:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

Budget means , I don't use a Mainframe
with a Job Control language. Budget means
ca. 1000 USD for the AI Laptops (Yoga, Ryzen

and Think) I bought end of 2025, and ca. 500
USD for the AI Laptop (Mac Neo) I bought
middle of 2026. I explained that already to

the Micro Penis moron. Now I explain it
again to the Rossy Boy herpes blister
corona victim.

Bye

Ross Finlayson schrieb:

How about Silicon Grid Engine and MPI, OpenMP and old cluster.


Or old "batch jobs".

Batch jobs:-a it's how work gets done.



You crazy frothing lunatic

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

I don't have the feeling its rocket science
what I did. But maybe, since idiocracy has
definitively reached computer science,

you can now call yourself software engineer,
with a Hackathon certificate, and a GitHub
account. I might be mistaken, and you need

to be Einstain to understand the Giga Lips result?

Idiocracy (2006) - Movie Trailer
https://www.youtube.com/watch?v=te5vtOEz7sY

"Two things are infinite: the universe and human
stupidity; and I'm not sure about the universe."
-- Einstein

Bye

Mild Shock schrieb:

Hi,

But please go on Rossy Boy, ask more stupid
questions, that I have already answered in
relation to Micro Penis.

I am happy to repeat, what I already have
posted, again and again. If necesssary I
will repeat the well known material,

that everybody can find on the internet,
again like 1000x times. I have no problem with
that providing this information again and

again, as long as stupid questions are asked.

Bye

Mild Shock schrieb:

Hi,

Rossy Boy is slower than Micro Penis.
Both being heavy alcoholic. Both don't
understand the "budget" here:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Budget means , I don't use a Mainframe
with a Job Control language. Budget means
ca. 1000 USD for the AI Laptops (Yoga, Ryzen

and Think) I bought end of 2025, and ca. 500
USD for the AI Laptop (Mac Neo) I bought
middle of 2026. I explained that already to

the Micro Penis moron. Now I explain it
again to the Rossy Boy herpes blister
corona victim.

Bye

Ross Finlayson schrieb:

How about Silicon Grid Engine and MPI, OpenMP and old cluster.


Or old "batch jobs".

Batch jobs:-a it's how work gets done.



You crazy frothing lunatic

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

But you don't need to be Einstein either, to
understand how marketing adresses different
audience segments. "Budget" might imply

less prestige. 50% of Micro Penis argumentation
was driven by the prestige of NVIDIA RTX 5090. Now
the Marketing offers "Gucci Bag" AI Laptops:

Price Tag: 4'200 CHF

Mobile Workstation P1 Gen 8
NVIDIA RTX PROrao 2000 Blackwell GPU https://www.lenovo.com/ch/de/p/laptops/thinkpad/thinkpadp/lenovo-thinkpad-p1-gen-8-16-inch-intel-mobile-workstation/21q80008mz

Price Tag: 4'900 CHF

HP Limited Edition Scuderia Ferrari Notebook
Intel-< Arcrao B390 GPU https://www.hp.com/ch-en/shop/products/laptops/hp-limited-edition-scuderia-ferrari-notebook-next-gen-ki-pc-dv4g9et-uuz

It never ends, it goes up and up, there are
even more expensive laptops now.

I think its ok, if you can spare multiple fake
software engineers, or data scientists, or what
ever that asks for 100'000 CHF salary per

year, in the average. Like if you use the AI
Laptop for AI Copilot accelerated coding. Just
do the math.

Bye

Mild Shock schrieb:

Hi,

I don't have the feeling its rocket science
what I did. But maybe, since idiocracy has
definitively reached computer science,

you can now call yourself software engineer,
with a Hackathon certificate, and a GitHub
account. I might be mistaken, and you need

to be Einstain to understand the Giga Lips result?

Idiocracy (2006) - Movie Trailer
https://www.youtube.com/watch?v=te5vtOEz7sY

"Two things are infinite: the universe and human
stupidity; and I'm not sure about the universe."
-- Einstein

Bye

Mild Shock schrieb:

Hi,

But please go on Rossy Boy, ask more stupid
questions, that I have already answered in
relation to Micro Penis.

I am happy to repeat, what I already have
posted, again and again. If necesssary I
will repeat the well known material,

that everybody can find on the internet,
again like 1000x times. I have no problem with
that providing this information again and

again, as long as stupid questions are asked.

Bye

Mild Shock schrieb:

Hi,

Rossy Boy is slower than Micro Penis.
Both being heavy alcoholic. Both don't
understand the "budget" here:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Budget means , I don't use a Mainframe
with a Job Control language. Budget means
ca. 1000 USD for the AI Laptops (Yoga, Ryzen

and Think) I bought end of 2025, and ca. 500
USD for the AI Laptop (Mac Neo) I bought
middle of 2026. I explained that already to

the Micro Penis moron. Now I explain it
again to the Rossy Boy herpes blister
corona victim.

Bye

Ross Finlayson schrieb:

How about Silicon Grid Engine and MPI, OpenMP and old cluster.


Or old "batch jobs".

Batch jobs:-a it's how work gets done.



You crazy frothing lunatic

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Frameworks like WebLLM leverage WebGPU to run large language models
locally inside browsers like Google Chrome, providing completely
private, offline AI assistants.

since when google chrome private, think again
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 07/21/2026 01:17 AM, Mild Shock wrote:

Hi,

But please go on Rossy Boy, ask more stupid
questions, that I have already answered in
relation to Micro Penis.

I am happy to repeat, what I already have
posted, again and again. If necesssary I
will repeat the well known material,

that everybody can find on the internet,
again like 1000x times. I have no problem with
that providing this information again and

again, as long as stupid questions are asked.

Bye

Mild Shock schrieb:

Hi,

Rossy Boy is slower than Micro Penis.
Both being heavy alcoholic. Both don't
understand the "budget" here:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Budget means , I don't use a Mainframe
with a Job Control language. Budget means
ca. 1000 USD for the AI Laptops (Yoga, Ryzen

and Think) I bought end of 2025, and ca. 500
USD for the AI Laptop (Mac Neo) I bought
middle of 2026. I explained that already to

the Micro Penis moron. Now I explain it
again to the Rossy Boy herpes blister
corona victim.

Bye

Ross Finlayson schrieb:

How about Silicon Grid Engine and MPI, OpenMP and old cluster.


Or old "batch jobs".

Batch jobs: it's how work gets done.



You crazy frothing lunatic

About events or business events, the usual idea of
their "lifetime" or the "open and closed" makes that
there's one guarantee and two error modes:
"no drops, and, no dupes".

Then, the usual idea to make a streaming or granular unit
of work vis-a-vis making the audit for the day, and calling
that a batch, has that whether "streaming" or "batch",
dispatching and closing the units-of-work at some point
involves a section of critical transactionality, if
merely to give each one a unique number and make all
effects on it as a forward state-machine with idempotent
operations in the eventually consistent the horizontally scale-able.


The pi-calculus is as simple as models of concurrent workers,
if each get given "keys-to-the-kingdom" don't expect them all back. ("Zero-trust" here is a usual idea of reasonable expectations.)


I'm not drunk, and don't post drunk, you tweaker,
and alcoholics go to meetings: the many variants
of COVID-19 are endemic throughout the population.
(P.S. I'm not your boy and never bought any abreva.)



Making critical transactionality with UUID's
and forward-safe idempotent-operation state-machines,
the "eventually-consistent" and the "self-healing",
with usually enough "Murphy's law and re-try logic",
a model of a distributed algorithm either has that
or it doesn't.


Calling the "non-deterministic" the "deterministic" is wrong.

Logicist-positivism: it's all of science, and all science.


--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Nice Freundian Slip the below self
description of yours. Rossy Boy!

LoL

Bye

Ross Finlayson schrieb:

You crazy frothing lunatic

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

------------------- begin --------------------
Teaching Micro Penis Vilage Idiot
------------------- begin --------------------

You dont have to use WebLLM, respectively
WebGPU / WGSL literally, just read the next
post I did AND use your brains moron:

Like WebAssembly before it, WebGPU has "escaped" the browser https://blog.4dpipeline.com/client-side-ai-is-here-how-webgpu-transforms-your-gpu-server-economics

http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access
an offline AI assistant, via some REST end-point

on your machine. Nothing to do with Google Chrome
browser security. You can make it as private as you want, by
having a firewall and not outward or inward

connection at all, only your REST end-point
on your machine. Or if you want a REST end-point
on a server of yours in the same intranet.

You don't need to use the internet, or put
something on the extranet, or use some sort of
subscription. What you need is access through

the firewall to download the REST software
and the LLM model. Tools like LM Studio and oMLX
offer this download and also install REST endpoint.

------------------- end --------------------
Teaching Micro Penis Vilage Idiot}
------------------- end --------------------

Bye

Will Bakshandaev schrieb:

Mild Shock wrote:

Frameworks like WebLLM leverage WebGPU to run large language models
locally inside browsers like Google Chrome, providing completely
private, offline AI assistants.

since when google chrome private, think again

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 07/21/2026 01:27 PM, Mild Shock wrote:

Hi,

Nice Freundian Slip the below self
description of yours. Rossy Boy!

LoL

Bye

Ross Finlayson schrieb:

You crazy frothing lunatic

Sure, projection is a constant,
takes one to know one and the like.


About though your inconstancy and shilling of scams,
whether it's ponzi fraud or drug dispensing or now
crazy amounts of RAM, here the baseline estimate of
the cost of 1 megabyte of RAM (DRAM, vis-a-vis NVRAM
and since EEPROM, which is sort of a misnomer), is: $100.

So, the cost of RAM these days is incredibly _low_,
the costs of CPU and RAM and NET have gone to zero.
Thusly, that's an inefficiency of the economy,
and since their costs are about zero,
they should pay about infinity,
which is a nice natural sort of economic law
"Adam Smith's Obvious Thumb", which would seek
to address inefficiencies and inversions of the
economy by having datacenters pay on the scale,
since their real value has gone to zero,
for "Smith-Samuelson economic parity law".


About DirectDraw and Direct2D and DirectX and
display technologies since VGA, SVGA, I suppose
about EXGA then W and Q XGA, or these days, and
about OpenGL and later WebGL, and about Adobe
technologies, 99% of the traffic of the Internet
is JPEG and MPEG.



I'm not a big fan of Freud. Yet, besides him being
a Freudian, at least at some point in "Civilizations
and its Discontents", Freud actually apologizes to
his readers for making such a mess of things.


It's like when Schopenhauer has nice Latin words
for anal and oral fixations: that's still profane.



Anyways just like super-scalar architectures
or generative programming, both around since
the 1960's, old-wrapped-as-new gets old.

And shilling scams is considered cheap.



Anyway here there's "A-Theory" and "The Logic",
so, when one day you wake up and realize that
large, competent, conscientious, co-operative
reasoners have an account of capital-T Truth,
then the burst bubble of your megalomania
will be quite deflating.


--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Currently companies such as Apple, Windows, etc..
are hardning their operating systems, so
that they can provide agentic AI sandboxes.

Problem is an agentic AI, that acts on your
behalf, when not enough supervised, might
do all kind of stuff on its own. So how do you

have harder borders. Besides companies that
write operating systems, there is also a cottage
industry now that adresses this paranoia,

here an example from a former Prologer:

Stop guessing what your coding agent just did
Prempti: Guardrails and Observability for AI Coding Agents. https://prempti.falco.org/

IntelliJ doesn't have this problem, it shows a
not yet hyper locally commited change, in the editor,
created by the AI, that you can review, and

then hyper locally commit in the editor. Only then
it lands in the file system. But also there it
will be subject to the local history and repository

version system. So the IntelliJ AI is pretty smartly
implemented, and hooks into their editors and newly
introduced hyper change visualization, a feature that

probably codemirror doesn't have yet. Have to double check.

Have Fun!

Bye

Mild Shock schrieb:

Hi,

------------------- begin --------------------
Teaching Micro Penis Vilage Idiot
------------------- begin --------------------

You dont have to use WebLLM, respectively
WebGPU / WGSL literally, just read the next
post I did AND use your brains moron:

Like WebAssembly before it, WebGPU has "escaped" the browser https://blog.4dpipeline.com/client-side-ai-is-here-how-webgpu-transforms-your-gpu-server-economics

http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access
an offline AI assistant, via some REST end-point

on your machine. Nothing to do with Google Chrome
browser security. You can make it as private as you want, by
having a firewall and not outward or inward

connection at all, only your REST end-point
on your machine. Or if you want a REST end-point
on a server of yours in the same intranet.

You don't need to use the internet, or put
something on the extranet, or use some sort of
subscription. What you need is access through

the firewall to download the REST software
and the LLM model. Tools like LM Studio and oMLX
offer this download and also install REST endpoint.

------------------- end --------------------
Teaching Micro Penis Vilage Idiot}
------------------- end --------------------

Bye

Will Bakshandaev schrieb:

Mild Shock wrote:

Frameworks like WebLLM leverage WebGPU to run large language models
locally inside browsers like Google Chrome, providing completely
private, offline AI assistants.

since when google chrome private, think again

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

What would an EMACs guru say. Can
EMACs process the equivalent of these
HTML tags:

The <ins> HTML element represents a
range of text that has been added to a document. https://developer.mozilla.org/en-US/docs/Web/HTML/Reference/Elements/ins

The <del> HTML element represents a range
of text that has been deleted from a document. https://developer.mozilla.org/en-US/docs/Web/HTML/Reference/Elements/del

This can be used when rendering "track changes"
or source code diff information, for example.
Office word can do it as well, track changes.

In principle somehow, every editor that has undo
and redo, dunno, can Excel show changes? What was
Windows Recall again on an AI Laptop?

Windows Recall takes a screenshot of a user's
desktop every few seconds, then uses on-device
large language models to allow a user to
retrieve items and information that had
previously been on their screen.

https://en.wikipedia.org/wiki/Windows_Recall

A little bit unstructured, compared to the
HTML tags and quite neurotic approach.

Bye

Mild Shock schrieb:

Hi,

Currently companies such as Apple, Windows, etc..
are hardning their operating systems, so
that they can provide agentic AI sandboxes.

Problem is an agentic AI, that acts on your
behalf, when not enough supervised, might
do all kind of stuff on its own. So how do you

have harder borders. Besides companies that
write operating systems, there is also a cottage
industry now that adresses this paranoia,

here an example from a former Prologer:

Stop guessing what your coding agent just did
Prempti: Guardrails and Observability for AI Coding Agents. https://prempti.falco.org/

IntelliJ doesn't have this problem, it shows a
not yet hyper locally commited change, in the editor,
created by the AI, that you can review, and

then hyper locally commit in the editor. Only then
it lands in the file system. But also there it
will be subject to the local history and repository

version system. So the IntelliJ AI is pretty smartly
implemented, and hooks into their editors and newly
introduced hyper change visualization, a feature that

probably codemirror doesn't have yet. Have to double check.

Have Fun!

Bye

Mild Shock schrieb:

Hi,

------------------- begin --------------------
Teaching Micro Penis Vilage Idiot
------------------- begin --------------------

You dont have to use WebLLM, respectively
WebGPU / WGSL literally, just read the next
post I did AND use your brains moron:

Like WebAssembly before it, WebGPU has "escaped" the browser
https://blog.4dpipeline.com/client-side-ai-is-here-how-webgpu-transforms-your-gpu-server-economics


http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access
an offline AI assistant, via some REST end-point

on your machine. Nothing to do with Google Chrome
browser security. You can make it as private as you want, by
having a firewall and not outward or inward

connection at all, only your REST end-point
on your machine. Or if you want a REST end-point
on a server of yours in the same intranet.

You don't need to use the internet, or put
something on the extranet, or use some sort of
subscription. What you need is access through

the firewall to download the REST software
and the LLM model. Tools like LM Studio and oMLX
offer this download and also install REST endpoint.

------------------- end --------------------
Teaching Micro Penis Vilage Idiot}
------------------- end --------------------

Bye

Will Bakshandaev schrieb:

Mild Shock wrote:

Frameworks like WebLLM leverage WebGPU to run large language models
locally inside browsers like Google Chrome, providing completely
private, offline AI assistants.

since when google chrome private, think again

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access an offline AI assistant, via some REST end-point

yet one more proof this half german inbreed is an imbecile, ports go up to 16bits/64k only, idiot, you cant have a localhost: whatever wrong number
you put there. You extreme fucking idiot.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

on your machine. Nothing to do with Google Chrome browser security. You
can make it as private as you want, by having a firewall and not outward
or inward

yes, i can see your point, they just want your private cellphone number,
there rest is private and free, idiot
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Maybe you could post some subtantial critique moron?
Instead of gibberish all the time. What does a cellphone
number have to do with a REST endpoint? Nothing!

Its all locally and my laptop has no cellphone number:

Start the REST API server

To start the server, run the following command:
lms server start

Endpoints

GET /api/v0/models
List all loaded and downloaded models
Example request
curl -H "Authorization: Bearer $LM_API_TOKEN" http://localhost:1234/api/v0/models
Response format
{
"object": "list",
"data": [
{
"id": "qwen2-vl-7b-instruct",
"object": "model",
"type": "vlm",
"publisher": "mlx-community",
"arch": "qwen2_vl"
Etc...
https://lmstudio.ai/docs/developer/rest/endpoints

Bye

BTW: LM Studio recently introduced LM Link,
which provides some VPN. It can be used to
create clients or servers that run models.

It is end-to-end encrypted, and built on top
of custom Tailscale mesh VPNs. This is for
the paranoid, that want to acccess a

LLM from one end of the globe, that sits
on the other end of the globe, and have
no evesdroper or whatever on the

information that is exchanged.

Mild Shock wrote:

http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically
access an offline AI assistant, via some REST end-point

yet one more proof this half german inbreed
is an imbecile, ports go up to 16bits/64k only,
idiot, you cant have a localhost: whatever wrong
number you put there. You extreme fucking idiot.

on your machine. Nothing to do with Google
Chrome browser security. You can make it as private
as you want, by having a firewall and not outward
or inward

yes, i can see your point, they just want
your private cellphone number,
there rest is private and free, idiot

Mild Shock schrieb:

Hi,

------------------- begin --------------------
Teaching Micro Penis Vilage Idiot
------------------- begin --------------------

You dont have to use WebLLM, respectively
WebGPU / WGSL literally, just read the next
post I did AND use your brains moron:

Like WebAssembly before it, WebGPU has "escaped" the browser https://blog.4dpipeline.com/client-side-ai-is-here-how-webgpu-transforms-your-gpu-server-economics

http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access
an offline AI assistant, via some REST end-point

on your machine. Nothing to do with Google Chrome
browser security. You can make it as private as you want, by
having a firewall and not outward or inward

connection at all, only your REST end-point
on your machine. Or if you want a REST end-point
on a server of yours in the same intranet.

You don't need to use the internet, or put
something on the extranet, or use some sort of
subscription. What you need is access through

the firewall to download the REST software
and the LLM model. Tools like LM Studio and oMLX
offer this download and also install REST endpoint.

------------------- end --------------------
Teaching Micro Penis Vilage Idiot}
------------------- end --------------------

Bye

Will Bakshandaev schrieb:

Mild Shock wrote:

Frameworks like WebLLM leverage WebGPU to run large language models
locally inside browsers like Google Chrome, providing completely
private, offline AI assistants.

since when google chrome private, think again

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

How confused is tiny winy penis?
For the 100th time the budget here:

11.4 Giga Lips with a Budget Laptop
Ryzen AI 7 350 w/ Radeon 860M https://github.com/Jean-Luc-Picard-2021/gigabudget

is a laptop and not a smartphone. It
has no cellphone number. And w/ means
integrated GPU on the silicon chip,

and not a GPU connected to the mainboard
via some PCI bus. The model is a acer
swift go, I already posted this info:

Swift Go 16 AI SFG16-61-R21J Notebook https://www.acer.com/ch-de/laptops/swift/swift-go-16-ai-amd/pdp/NX.JCREZ.007

Bye

Mild Shock schrieb:

Hi,

Maybe you could post some subtantial critique moron?
Instead of gibberish all the time. What does a cellphone
number have to do with a REST endpoint? Nothing!

Its all locally and my laptop has no cellphone number:

Start the REST API server

To start the server, run the following command:
lms server start

Endpoints

GET /api/v0/models
List all loaded and downloaded models
Example request
curl -H "Authorization: Bearer $LM_API_TOKEN" http://localhost:1234/api/v0/models
Response format
{
-a "object": "list",
-a "data": [
-a-a-a {
-a-a-a-a-a "id": "qwen2-vl-7b-instruct",
-a-a-a-a-a "object": "model",
-a-a-a-a-a "type": "vlm",
-a-a-a-a-a "publisher": "mlx-community",
-a-a-a-a-a "arch": "qwen2_vl"
Etc...
https://lmstudio.ai/docs/developer/rest/endpoints

Bye

BTW: LM Studio recently introduced LM Link,
which provides some VPN. It can be used to
create clients or servers that run models.

It is end-to-end encrypted, and built on top
of custom Tailscale mesh VPNs. This is for
the paranoid, that want to acccess a

LLM from one end of the globe, that sits
on the other end of the globe, and have
no evesdroper or whatever on the

information that is exchanged.

Mild Shock wrote:

http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access an offline AI
assistant, via some REST end-point

yet one more proof this half german inbreed is an imbecile, ports go
up to 16bits/64k only, idiot, you cant have a localhost: whatever
wrong number you put there. You extreme fucking idiot.

on your machine. Nothing to do with Google Chrome browser security.
You can make it as private as you want, by having a firewall and not
outward
or inward

yes, i can see your point, they just want your private cellphone
number, there rest is private and free, idiot

Mild Shock schrieb:

Hi,

------------------- begin --------------------
Teaching Micro Penis Vilage Idiot
------------------- begin --------------------

You dont have to use WebLLM, respectively
WebGPU / WGSL literally, just read the next
post I did AND use your brains moron:

Like WebAssembly before it, WebGPU has "escaped" the browser
https://blog.4dpipeline.com/client-side-ai-is-here-how-webgpu-transforms-your-gpu-server-economics


http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access
an offline AI assistant, via some REST end-point

on your machine. Nothing to do with Google Chrome
browser security. You can make it as private as you want, by
having a firewall and not outward or inward

connection at all, only your REST end-point
on your machine. Or if you want a REST end-point
on a server of yours in the same intranet.

You don't need to use the internet, or put
something on the extranet, or use some sort of
subscription. What you need is access through

the firewall to download the REST software
and the LLM model. Tools like LM Studio and oMLX
offer this download and also install REST endpoint.

------------------- end --------------------
Teaching Micro Penis Vilage Idiot}
------------------- end --------------------

Bye

Will Bakshandaev schrieb:

Mild Shock wrote:

Frameworks like WebLLM leverage WebGPU to run large language models
locally inside browsers like Google Chrome, providing completely
private, offline AI assistants.

since when google chrome private, think again

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hey Micro Penis,

Maybe change your hobby, become a dog owner?
Instead of fiddling with your Sputnik Commodore
C64 from 1982, modded to run on a 8088.

Maybe change your hobby, become a dog owner.
But watch out, its not as easy as GitHub diploma,
you cannot carry a hackathon certificate home

by showing up 3 days and let your team mates
do all the pitch presentations and pretend
hacking. The hurdles here are quite high:

"Becoming a dog owner involves both a rewarding
commitment and legal obligations. Under law,
you must complete an accredited practical dog

education course within one year of acquiring
your pet. You must also register your dog with
the national AMICUS Database, have a veterinarian

implant a microchip, and pay the annual cantonal dog tax."

Good luck, get a life!

Bye

Mild Shock schrieb:

Hi,

How confused is tiny winy penis?
For the 100th time the budget here:

11.4 Giga Lips with a Budget Laptop
Ryzen AI 7 350 w/ Radeon 860M https://github.com/Jean-Luc-Picard-2021/gigabudget

is a laptop and not a smartphone. It
has no cellphone number. And w/ means
integrated GPU on the silicon chip,

and not a GPU connected to the mainboard
via some PCI bus. The model is a acer
swift go, I already posted this info:

Swift Go 16 AI SFG16-61-R21J Notebook https://www.acer.com/ch-de/laptops/swift/swift-go-16-ai-amd/pdp/NX.JCREZ.007

Bye

Mild Shock schrieb:

Hi,

Maybe you could post some subtantial critique moron?
Instead of gibberish all the time. What does a cellphone
number have to do with a REST endpoint? Nothing!

Its all locally and my laptop has no cellphone number:

Start the REST API server

To start the server, run the following command:
lms server start

Endpoints

GET /api/v0/models
List all loaded and downloaded models
Example request
curl -H "Authorization: Bearer $LM_API_TOKEN"
http://localhost:1234/api/v0/models
Response format
{
-a-a "object": "list",
-a-a "data": [
-a-a-a-a {
-a-a-a-a-a-a "id": "qwen2-vl-7b-instruct",
-a-a-a-a-a-a "object": "model",
-a-a-a-a-a-a "type": "vlm",
-a-a-a-a-a-a "publisher": "mlx-community",
-a-a-a-a-a-a "arch": "qwen2_vl"
Etc...
https://lmstudio.ai/docs/developer/rest/endpoints

Bye

BTW: LM Studio recently introduced LM Link,
which provides some VPN. It can be used to
create clients or servers that run models.

It is end-to-end encrypted, and built on top
of custom Tailscale mesh VPNs. This is for
the paranoid, that want to acccess a

LLM from one end of the globe, that sits
on the other end of the globe, and have
no evesdroper or whatever on the

information that is exchanged.

Mild Shock wrote:

http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access an offline AI
assistant, via some REST end-point

yet one more proof this half german inbreed is an imbecile, ports go
up to 16bits/64k only, idiot, you cant have a localhost: whatever
wrong number you put there. You extreme fucking idiot.

on your machine. Nothing to do with Google Chrome browser security.
You can make it as private as you want, by having a firewall and not
outward
or inward

yes, i can see your point, they just want your private cellphone
number, there rest is private and free, idiot

Mild Shock schrieb:

Hi,

------------------- begin --------------------
Teaching Micro Penis Vilage Idiot
------------------- begin --------------------

You dont have to use WebLLM, respectively
WebGPU / WGSL literally, just read the next
post I did AND use your brains moron:

Like WebAssembly before it, WebGPU has "escaped" the browser
https://blog.4dpipeline.com/client-side-ai-is-here-how-webgpu-transforms-your-gpu-server-economics


http://localhost:567921/ is private you moron.,
or what ever port REST is using. You typically access
an offline AI assistant, via some REST end-point

on your machine. Nothing to do with Google Chrome
browser security. You can make it as private as you want, by
having a firewall and not outward or inward

connection at all, only your REST end-point
on your machine. Or if you want a REST end-point
on a server of yours in the same intranet.

You don't need to use the internet, or put
something on the extranet, or use some sort of
subscription. What you need is access through

the firewall to download the REST software
and the LLM model. Tools like LM Studio and oMLX
offer this download and also install REST endpoint.

------------------- end --------------------
Teaching Micro Penis Vilage Idiot}
------------------- end --------------------

Bye

Will Bakshandaev schrieb:

Mild Shock wrote:

Frameworks like WebLLM leverage WebGPU to run large language models
locally inside browsers like Google Chrome, providing completely
private, offline AI assistants.

since when google chrome private, think again

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Maybe you could post some subtantial critique moron? Instead of
gibberish all the time. What does a cellphone number have to do with a
REST endpoint? Nothing!

Its all locally and my laptop has no cellphone number:

you lying bitch, your arse is burning, you said google chrome security,
and gave them your cellphone number, fucking idiot. And you put wrong
ports numbers along the localhost: idiot
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Moron, from St. Petersburg, with only 5G internet.
You confuse browser security model with Google account.
No cellphone number involved in a brower JavaScript

secure sand box, for executing JavaScript in the main
and in isolated silod workers. Also you seem not to see
that I post CHF price tags and CHF product listings.

So what makes you think Switzerland == Germany,
when you rant like below. Even a dog knows that a
non-EU country cannot be the same as EU country:

you stupid half german, the comparisons along
memories arrays gpu card located, are taking place
parallel without cpu intervention, you fucking
illiterate idiot. You soon will become a quarter
german hence 3/4 russian old days, historically. It's coming

German energy crisis caused by rCylack of Russian gasrCO rCo Merz https://www.rt.com/news/643254-germany-crisis-russian-gas/

Bye

P.S.: EU = European Union

Audie Balaban schrieb:

Mild Shock wrote:

Maybe you could post some subtantial critique moron? Instead of
gibberish all the time. What does a cellphone number have to do with a
REST endpoint? Nothing!

Its all locally and my laptop has no cellphone number:

you lying bitch, your arse is burning, you said google chrome security,
and gave them your cellphone number, fucking idiot. And you put wrong
ports numbers along the localhost: idiot

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Moron, from St. Petersburg, with only 5G internet.
You confuse browser security model with Google account.
No cellphone number involved in a brower JavaScript

cretin, they already have your phone number, the IMEI, email adr, location
and everything, your friends included. Idiot, I cant even believe it.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Die IMEI (International Mobile Equipment Identity)
ist eine 15-stellige, weltweit eindeutige Seriennummer,
die jedes Mobiltelefon identifiziert.

Die meisten Laptops haben keine IMEI-Nummer. Sie
existiert nur, wenn das Ger|nt |+ber ein integriertes
Mobilfunkmodem (WWAN/LTE/5G-Karte) f|+r SIM-Karten verf|+gt.

Also in Switzerland people have fiber optic earth
cables for internet, and not some 5G over the air.
I got like 10 GBit/s fiber here in my home.

There are 96 internet service providers that offer that speed:

https://www.comparis.ch/telecom/zuhause/angebote/list?requestobject={%22products%22%3A[1]%2C%22onlyOffersWithoutMinimumDuration%22%3Afalse%2C%22internetSpeedTypes%22%3A[1]%2C%22connectionTypes%22%3A[1]%2C%22tvOptions%22%3A[]%2C%22landlineOptions%22%3A[]%2C%22providers%22%3A[]%2C%22showDiscountedOnly%22%3Afalse%2C%22addressCheckInfo%22%3A{%22AvailableCableProviders%22%3Anull%2C%22AvailableVdslSpeed%22%3Anull%2C%22AvailableFiberSpeed%22%3Anull%2C%22AvailableInit7Fiber%22%3Afalse%2C%22AvailableAllFiberProvidersExceptInit7%22%3Afalse}%2C%22address%22%3A{%22Zip%22%3Anull%2C%22Street%22%3Anull%2C%22StreetNumber%22%3Anull}}
Angebote f|+r Internet, TV und Festnetz-Telefon, sowie Kombiangebote

Its handy to download LLMs which have GB sizes.

But this laptop has no SIM Card, even not a e-SIM:

How confused is tiny winy penis?
For the 100th time the budget here:

11.4 Giga Lips with a Budget Laptop
Ryzen AI 7 350 w/ Radeon 860M https://github.com/Jean-Luc-Picard-2021/gigabudget

is a laptop and not a smartphone. It
has no cellphone number. And w/ means
integrated GPU on the silicon chip,

and not a GPU connected to the mainboard
via some PCI bus. The model is a acer
swift go, I already posted this info:

Swift Go 16 AI SFG16-61-R21J Notebook https://www.acer.com/ch-de/laptops/swift/swift-go-16-ai-amd/pdp/NX.JCREZ.007

Bye

Roque Bahtinov schrieb:

Mild Shock wrote:

Moron, from St. Petersburg, with only 5G internet.
You confuse browser security model with Google account.
No cellphone number involved in a brower JavaScript

cretin, they already have your phone number, the IMEI, email adr, location and everything, your friends included. Idiot, I cant even believe it.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

5 year old moron. Why does it take 11 hours until
your next nonsense pours in? Takes too much time
to create a new nickname and new email every time?

Well once a moron, always a moron.

Bye

Mild Shock schrieb:

Hi,

Die IMEI (International Mobile Equipment Identity)
ist eine 15-stellige, weltweit eindeutige Seriennummer,
die jedes Mobiltelefon identifiziert.

Die meisten Laptops haben keine IMEI-Nummer. Sie
existiert nur, wenn das Ger|nt |+ber ein integriertes
Mobilfunkmodem (WWAN/LTE/5G-Karte) f|+r SIM-Karten verf|+gt.

Also in Switzerland people have fiber optic earth
cables for internet, and not some 5G over the air.
I got like 10 GBit/s fiber here in my home.

There are 96 internet service providers that offer that speed:

https://www.comparis.ch/telecom/zuhause/angebote/list?requestobject={%22products%22%3A[1]%2C%22onlyOffersWithoutMinimumDuration%22%3Afalse%2C%22internetSpeedTypes%22%3A[1]%2C%22connectionTypes%22%3A[1]%2C%22tvOptions%22%3A[]%2C%22landlineOptions%22%3A[]%2C%22providers%22%3A[]%2C%22showDiscountedOnly%22%3Afalse%2C%22addressCheckInfo%22%3A{%22AvailableCableProviders%22%3Anull%2C%22AvailableVdslSpeed%22%3Anull%2C%22AvailableFiberSpeed%22%3Anull%2C%22AvailableInit7Fiber%22%3Afalse%2C%22AvailableAllFiberProvidersExceptInit7%22%3Afalse}%2C%22address%22%3A{%22Zip%22%3Anull%2C%22Street%22%3Anull%2C%22StreetNumber%22%3Anull}}

Angebote f|+r Internet, TV und Festnetz-Telefon, sowie Kombiangebote

Its handy to download LLMs which have GB sizes.

But this laptop has no SIM Card, even not a e-SIM:

How confused is tiny winy penis?
For the 100th time the budget here:

11.4 Giga Lips with a Budget Laptop
Ryzen AI 7 350 w/ Radeon 860M
https://github.com/Jean-Luc-Picard-2021/gigabudget

is a laptop and not a smartphone. It
has no cellphone number. And w/ means
integrated GPU on the silicon chip,

and not a GPU connected to the mainboard
via some PCI bus. The model is a acer
swift go, I already posted this info:

Swift Go 16 AI SFG16-61-R21J Notebook
https://www.acer.com/ch-de/laptops/swift/swift-go-16-ai-amd/pdp/NX.JCREZ.007

Bye

Roque Bahtinov schrieb:

Mild Shock wrote:

Moron, from St. Petersburg, with only 5G internet.
You confuse browser security model with Google account.
No cellphone number involved in a brower JavaScript

cretin, they already have your phone number, the IMEI, email adr,
location
and everything, your friends included. Idiot, I cant even believe it.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Also in Switzerland people have fiber optic earth cables for internet,
and not some 5G over the air.
I got like 10 GBit/s fiber here in my home.

wow, you think they are stupid, they cant see your location through the
fiber; you are like a search tree, idiot, they know the name and the ID of
all the crap you have around; then you said google chrome is private,
private my ass
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Since I don't belong to some post CCCP,
cigaret smuggling cartell, I have nothing
to hide. If you are clever you find

my telefon number on search.ch. Whats
wrong with you? Do you sit in a asylum
for mentally disabled persons?

Bye

Randolf Mukanov schrieb:

Mild Shock wrote:

Also in Switzerland people have fiber optic earth cables for internet,
and not some 5G over the air.
I got like 10 GBit/s fiber here in my home.

wow, you think they are stupid, they cant see your location through the fiber; you are like a search tree, idiot, they know the name and the ID of all the crap you have around; then you said google chrome is private,
private my ass

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Since I don't belong to some post CCCP, cigaret smuggling cartell, I
have nothing to hide. If you are clever you find

hence you are admitting you are a fucking inbreed half german idiot from birth. Thanks making it clearer.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

I have nothing to hide, you can find me in search.ch

Since when belongs .ch to German? The .ch
is the country code top-level domain (ccTLD)
for Switzerland in the Domain Name System
of the Internet.

If you want find proof of Germany, you
would need to see .de. That I use a German
usenet provider doesn't mean I am German.
Everybody can use solani.org.

Switzerland, SWITCH
https://en.wikipedia.org/wiki/.ch

Germany, DENIC
https://en.wikipedia.org/wiki/.de

nicht-kommerziellen Usenet-News-Server
https://solani.org/

Whats wrong with you?

Bye

Keiv Babenchikov schrieb:

Mild Shock wrote:

Since I don't belong to some post CCCP, cigaret smuggling cartell, I
have nothing to hide. If you are clever you find

hence you are admitting you are a fucking inbreed half german idiot from birth. Thanks making it clearer.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Since the Vodka has burn all your brain cells,
ask a Ukrainian Neighbour to do Detective.

You might find people smarter than you, you
are already at the lower left end in the Gauss

curve, of an IQ suitable for software engineering.

Bye

Mild Shock schrieb:

Hi,

I have nothing to hide, you can find me in search.ch

Since when belongs .ch to German? The .ch
is the country code top-level domain (ccTLD)
for Switzerland in the Domain Name System
of the Internet.

If you want find proof of Germany, you
would need to see .de. That I use a German
usenet provider doesn't mean I am German.
Everybody can use solani.org.

Switzerland, SWITCH
https://en.wikipedia.org/wiki/.ch

Germany, DENIC
https://en.wikipedia.org/wiki/.de

nicht-kommerziellen Usenet-News-Server
https://solani.org/

Whats wrong with you?

Bye

Keiv Babenchikov schrieb:

Mild Shock wrote:

Since I don't belong to some post CCCP, cigaret smuggling cartell, I
have nothing to hide. If you are clever you find

hence you are admitting you are a fucking inbreed half german idiot from
birth. Thanks making it clearer.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Since the Vodka has burn all your brain cells, ask a Ukrainian Neighbour
to do Detective.

You might find people smarter than you, you are already at the lower
left end in the Gauss

curve, of an IQ suitable for software engineering.

now bend over and ask him for more
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

CAS and XADD have no looping, they
are atomic operations, that take some
time but basically have some outcome

with some ACID property and a result
value. What loops is the ADT, the Abstract
Data Type that you implement. Respectively

the client that uses the Abstract Data Type.
In your case you added the loop inside the
Abstract Data Type or lower level aggregate

code of a higher level operation:

Chris M. Thomasson wrote:
void producer(double state) {
uint32_t ver = XADD(&head, 1);
cell& c = cells[ver & (N - 1)];
while (LOAD(&c.ver) != ver) backoff(); /** Looping **/
c.state = state;
STORE(&c.ver, ver + 1);
}
https://groups.google.com/g/lock-free/c/acjQ3-89abE/m/a6-Di0GZsyEJ

In my case I added the loop during the client
usage of the ADT:

From: Mild Shock <janburse@fastmail.fm>
Subject: Source of the benchmark for DmitryVyukov
Date: Tue, 21 Jul 2026 01:44:21 +0200

private static void producer(Queue q) {
for (int i = 0; i < WORK; i++) {
Integer val = Integer.valueOf(i);
while (!enqueue(q, val)) ; /** Looping **/
}
}

Do you see the two loops, in your C code
and in my Java code? They are marked with a
comment /** Looping **/ .

You see them, don't you? But I don't know
exactly what backoff() does. Sometimes loops
are spurious yield loops, required because

an ADT cannot gurantee that every yield
implies a certain condition. This is for
example already found in the intrinsinc

monitor of Java, the wait(). You might consult
Doug Lea about the matter and how idiomatic
Java code looks like dealing with

spurious yields.

Bye

Ross Finlayson schrieb:

On 07/20/2026 11:59 PM, Mild Shock wrote:

Hi,

Because of MIMD you have to reassess algorithms.
A spin loop which could really hurt non-MIMD
GPUs, might less hurt a MIMD GPU.

Basically you have to reassess algorithms. Be
very exact whether your claims relates to
non-MIMD or to MIMD. You can toy around

with WebGL, mainly made for non-MIMD, here:

https://www.shadertoy.com/

and with WegGPU, mainly made for MIMD, here:

https://compute.toys/

The compute toys page, supports two shader
languages, WGSL and Slang. I made my GPU
experiments only with WGSL.

So I don't know Slang either. Things I
don't know in the GPU world are:

- OpenGL 4.2 and later
- Slang https://shader-slang.org/

Things I have meanwhile hands on, and which
I plan to integrate into library(edge/brainfog):

- WGSL https://webgpufundamentals.org/

Bye

Mild Shock schrieb:

Hi,

I went to holdays in June 2026, had an idea for
a pi-WAM based on a Hack, the later is described here:

Emulating -C-WAM in Dogelog Player
https://medium.com/2989/de9cd29c7d37

The Elements of Computing Systems
https://mitpress.mit.edu/9780262539807

In July 2026 I did the CPU and GPU experiments,
moving from emulator to native executor based in
realizing Hack as a concrete virtual machine,

and not as an abstract machine emulated in Prolog.
The GPU experiments were done in WebGPU / WGSL.
So no, I never used OpenGL Version 4.2 and later.

Also the name imageAtomicAdd indicates that
imageAtomicAdd is rather from a render shader,
while my GPU experiment uses a compute shader.

Especially I need GPU compute shaders, which
are not executed in lock step, but rather have
indepdendent thread state, also known as MIMD.

"In computing, multiple instruction, multiple
data (MIMD) is a technique employed to
achieve parallelism. "
https://en.wikipedia.org/wiki/Multiple_instruction,_multiple_data

MIMID showed up 2017 with NVIDIA Volta cards.
But is now realized by Intel Arc, Snapdragon Adreno,
AMD RDNA and Apple Silicon as well.

Bye

Chris M. Thomasson schrieb:

On 7/20/2026 4:32 PM, Mild Shock wrote:

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers.

[...]

Are you sure about that! ;^o

How about Silicon Grid Engine and MPI, OpenMP and old cluster.

Or old "batch jobs".

Batch jobs:-a it's how work gets done.

You crazy frothing lunatic

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Hi,

CAS and XADD have no looping, they
are atomic operations, that take some
time but basically have some outcome

My father says C++ reminds him of an abortion.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Your father is regreting not using a
contraceptive. Now there is just one more
moron walking earth, and that moron

is you Lane W alias micro penis.

Bye

Lane W schrieb:

Mild Shock wrote:

Hi,

CAS and XADD have no looping, they
are atomic operations, that take some
time but basically have some outcome

My father says C++ reminds him of an abortion.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

Hi,

Your father is regreting not using a
contraceptive. Now there is just one more
moron walking earth, and that moron

is you Lane W alias micro penis.

Bye

Lane W schrieb:

Mild Shock wrote:

Hi,

CAS and XADD have no looping, they
are atomic operations, that take some
time but basically have some outcome

My father says C++ reminds him of an abortion.

Look at C++. It's awful. C# is ten times better. There isn't even type
string in C++. I could never go back to that.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/22/2026 4:13 PM, Lane W wrote:

Mild Shock wrote:

Hi,

Your father is regreting not using a
contraceptive. Now there is just one more
moron walking earth, and that moron

is you Lane W alias micro penis.

Bye

Lane W schrieb:

Mild Shock wrote:

Hi,

CAS and XADD have no looping, they
are atomic operations, that take some
time but basically have some outcome

My father says C++ reminds him of an abortion.

Look at C++. It's awful. C# is ten times better. There isn't even type string in C++. I could never go back to that.

Huh? std::string?
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Mild Shock wrote:

while (!enqueue(q, val)) ; /** Looping **/
}
}

Do you see the two loops, in your C code and in my Java code? They are
marked with a comment /** Looping **/ .

that's a while(FALSE) idiot, this guy doesnt know what he has there
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Lane W wrote:

My father says C++ reminds him of an abortion.

Look at C++. It's awful. C# is ten times better. There isn't even type
string in C++. I could never go back to that.

but why using another layer of crap over it
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/23/2026 6:01 AM, Kayce Pakhmutov wrote:

Mild Shock wrote:

while (!enqueue(q, val)) ; /** Looping **/
}
}

Do you see the two loops, in your C code and in my Java code? They are
marked with a comment /** Looping **/ .

that's a while(FALSE) idiot, this guy doesnt know what he has there

I don't think he knows exactly what he is doing... Why does he need a lock/wait-free queue in a compute shader? What is he trying to do?
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

You don't pay attention, right! I am little
bit disappointed that your attention span is
near zero. I already posted:

From: Mild Shock <janburse@fastmail.fm>
Subject: Why do you even need a mpmc queue? [Thunder Kittens]
Date: Thu, 23 Jul 2026 08:43:03 +0200

Hi,

Because I use WebGPU and not WebGL. And
because WebGPU can adresss modern GPU
developed with the NVIDIA Volta evolution,

which happened in 2017. Namley that compute
shaders are not any more subject to the
realization restriction of lock step

execution, but have independent thread state.
And because there is independent thread state
there is also independent time spent for a

a work item by each logical thread, if the
submitted logical thread uses a lot of branching
logic or even loops. But the use of branching

and loops is encouraged in independent thread
state programming of compute shaders. The variables
that can drive such logic are the scalar variables:

Tour of WGSL - Control Flow https://google.github.io/tour-of-wgsl/control-flow/

Then not to waste GPU compute time, by logical
threads doing nothing. You will need to
introduce some load balancing among multiple

logical threads. And MPMC queues are one way to
readize load balancing. Compute shaders with
producer and consumer entry points are proposed

as fundamental architecture by Thunder Kittens:

ThunderKittens: Simple, Fast, and Adorable AI Kernels https://arxiv.org/abs/2410.20399

They are used by this SpaceX acquisition:

Composer 2 Technical Report
https://arxiv.org/abs/2603.24477

Thunder Kittens uses Hardware support, i.e. tma_expect().

Bye

Chris M. Thomasson schrieb:

never meant to be used in a GPU.
Dmitry CAS version can be used, but

Why do you even need a mpmc queue
in your compute shader anyway?

Chris M. Thomasson schrieb:

I don't think he knows exactly what he is doing... Why does he need a lock/wait-free queue in a compute shader? What is he trying to do?

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

You can also deduce that I need comms,
from pi in pi-WAM, since pi refers to pi-calculus.
There is also a nice paper, that I have already posted:

A pi-calculus Specification of Prolog https://scispace.com/pdf/a-pi-calculus-specification-of-prolog-3qf2pf04ud.pdf

You asked yourself why no atomic and
only comms? So its as simple as 1+1=2.
But usenet people are usually slow as fuck.

Take your time. You could spin loop to ingest
the topic, i.e. try again in 3-4 months, for
example reading some of the paper. Although

I know thats a totally unrealistic request, asking
a troll to do RTFM and study something. They
rather make themselves a total laughing stock,

play stupid games, win usenet prizes.

Bye

Mild Shock schrieb:

Hi,

You don't pay attention, right! I am little
bit disappointed that your attention span is
near zero. I already posted:

From: Mild Shock <janburse@fastmail.fm>
Subject: Why do you even need a mpmc queue? [Thunder Kittens]
Date: Thu, 23 Jul 2026 08:43:03 +0200

Hi,

Because I use WebGPU and not WebGL. And
because WebGPU can adresss modern GPU
developed with the NVIDIA Volta evolution,

which happened in 2017. Namley that compute
shaders are not any more subject to the
realization restriction of lock step

execution, but have independent thread state.
And because there is independent thread state
there is also independent time spent for a

a work item by each logical thread, if the
submitted logical thread uses a lot of branching
logic or even loops. But the use of branching

and loops is encouraged in independent thread
state programming of compute shaders. The variables
that can drive such logic are the scalar variables:

Tour of WGSL - Control Flow
https://google.github.io/tour-of-wgsl/control-flow/

Then not to waste GPU compute time, by logical
threads doing nothing. You will need to
introduce some load balancing among multiple

logical threads. And MPMC queues are one way to
readize load balancing. Compute shaders with
producer and consumer entry points are proposed

as fundamental architecture by Thunder Kittens:

ThunderKittens: Simple, Fast, and Adorable AI Kernels
https://arxiv.org/abs/2410.20399

They are used by this SpaceX acquisition:

Composer 2 Technical Report
https://arxiv.org/abs/2603.24477

Thunder Kittens uses Hardware support, i.e. tma_expect().

Bye

Chris M. Thomasson schrieb:

never meant to be used in a GPU.
Dmitry CAS version can be used, but

Why do you even need a mpmc queue
in your compute shader anyway?

Chris M. Thomasson schrieb:

I don't think he knows exactly what he is doing... Why does he need a
lock/wait-free queue in a compute shader? What is he trying to do?

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Via concurrent logic programming, and the
The Fifth Generation Computer Systems
10-year initiative launched in 1982 by Japan:

Fifth Generation Computer Systems (FGCS) https://en.wikipedia.org/wiki/Fifth_Generation_Computer_Systems

There is a big fundus of material about
relating logic progra execution to parallel
execution. Unfortunetly the topic somehow

lost steam, and has been reduced to Remote
Procedure Call (RPC) of iterators inside the
Web Prolog initiative. But its evident that

this leads to nowhere, on modern CPU and GPU,
since RPC adds an additional comms aka message,
already to only communicate success or failure.

The other comms aka messages approach stems from
implementing parallel query executors for
relational databases and uses messages for

other things. It had already revival in 2008:

Google spotlights data center inner workings http://news.cnet.com/8301-10784_3-9955184-7.html

Just google MapReduce!

Bye

Mild Shock schrieb:

Hi,

You can also deduce that I need comms,
from pi in pi-WAM, since pi refers to pi-calculus.
There is also a nice paper, that I have already posted:

A pi-calculus Specification of Prolog https://scispace.com/pdf/a-pi-calculus-specification-of-prolog-3qf2pf04ud.pdf

You asked yourself why no atomic and
only comms? So its as simple as 1+1=2.
But usenet people are usually slow as fuck.

Take your time. You could spin loop to ingest
the topic, i.e. try again in 3-4 months, for
example reading some of the paper. Although

I know thats a totally unrealistic request, asking
a troll to do RTFM and study something. They
rather make themselves a total laughing stock,

play stupid games, win usenet prizes.

Bye

Mild Shock schrieb:

Hi,

You don't pay attention, right! I am little
bit disappointed that your attention span is
near zero. I already posted:

From: Mild Shock <janburse@fastmail.fm>
Subject: Why do you even need a mpmc queue? [Thunder Kittens]
Date: Thu, 23 Jul 2026 08:43:03 +0200

Hi,

Because I use WebGPU and not WebGL. And
because WebGPU can adresss modern GPU
developed with the NVIDIA Volta evolution,

which happened in 2017. Namley that compute
shaders are not any more subject to the
realization restriction of lock step

execution, but have independent thread state.
And because there is independent thread state
there is also independent time spent for a

a work item by each logical thread, if the
submitted logical thread uses a lot of branching
logic or even loops. But the use of branching

and loops is encouraged in independent thread
state programming of compute shaders. The variables
that can drive such logic are the scalar variables:

Tour of WGSL - Control Flow
https://google.github.io/tour-of-wgsl/control-flow/

Then not to waste GPU compute time, by logical
threads doing nothing. You will need to
introduce some load balancing among multiple

logical threads. And MPMC queues are one way to
readize load balancing. Compute shaders with
producer and consumer entry points are proposed

as fundamental architecture by Thunder Kittens:

ThunderKittens: Simple, Fast, and Adorable AI Kernels
https://arxiv.org/abs/2410.20399

They are used by this SpaceX acquisition:

Composer 2 Technical Report
https://arxiv.org/abs/2603.24477

Thunder Kittens uses Hardware support, i.e. tma_expect().

Bye

Chris M. Thomasson schrieb:

never meant to be used in a GPU.
Dmitry CAS version can be used, but

Why do you even need a mpmc queue
in your compute shader anyway?

Chris M. Thomasson schrieb:

I don't think he knows exactly what he is doing... Why does he need a
lock/wait-free queue in a compute shader? What is he trying to do?

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/24/2026 5:52 AM, Mild Shock wrote:

Hi,

You can also deduce that I need comms,
from pi in pi-WAM, since pi refers to pi-calculus.
There is also a nice paper, that I have already posted:

Show an outline of what you need you compute shader to do? I know about
them. My code loves to saturate points during iteration of some fun
things I am working on. BUT! I need those points to accumulate. So, I
use fetch-and-add in the compute shader to make sure that the
accumulations are coherent.

Its 100% loopless. Strive for avoid loops at all costs if you can,
epically in the GPU.

[...]
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Show an outline of what you need you compute shader to do?

Its all on GitHub , for the 100-th time .
Just RTFM , i.e. study the repo and the
medim article. Just follow this link:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

Whats wrong with you guys, did the AI boom
suck out all your braincells. I really have
no words for being that stupid and slow.

Bye

In particular the repo contains two versions
of a Hack VM, written in WebGPU / WGSL:

Hack VM: Version 1.0 https://github.com/Jean-Luc-Picard-2021/gigabudget/blob/main/course/example63/boot.mjs

Hack VM: Version 2.0 https://github.com/Jean-Luc-Picard-2021/gigabudget/blob/main/course/example64/boot2.mjs

Version 1.0 is for a single compute shader
expriment. And Version 2.o is for a multi
compute shader experiment.

Chris M. Thomasson schrieb:

On 7/24/2026 5:52 AM, Mild Shock wrote:

Hi,

You can also deduce that I need comms,
from pi in pi-WAM, since pi refers to pi-calculus.
There is also a nice paper, that I have already posted:

Show an outline of what you need you compute shader to do? I know about them. My code loves to saturate points during iteration of some fun
things I am working on. BUT! I need those points to accumulate. So, I
use fetch-and-add in the compute shader to make sure that the
accumulations are coherent.

Its 100% loopless. Strive for avoid loops at all costs if you can,
epically in the GPU.

[...]

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Mostlikely this is faster with MIMD,
than with SIMD. Draw a Mandel Brot Figure:

mandelbrot
https://compute.toys/view/213

Why, because each pixel has a different
result i, since this loop has a break:

for (i = 0; i < count; i++) {
if (z_re * z_re + z_im * z_im > 4.0) {
break;
}
let new_re = z_re * z_re - z_im * z_im;
let new_im = 2.0f * z_re * z_im;
z_re = c_re + new_re;
z_im = c_im + new_im;
}

So a sheduler balancer, that uses independent
thread state (MIMD), from a post NVIDIA Volta
type GPU, can squeeze out more computation,

than a lock step (SIMD) scheduler, from a
pre NVIDIA Volta GPU. I guess I will use that
as a balancing example for pi-WAM.

Bye

Mild Shock schrieb:

Hi,

You don't pay attention, right! I am little
bit disappointed that your attention span is
near zero. I already posted:

From: Mild Shock <janburse@fastmail.fm>
Subject: Why do you even need a mpmc queue? [Thunder Kittens]
Date: Thu, 23 Jul 2026 08:43:03 +0200

Hi,

Because I use WebGPU and not WebGL. And
because WebGPU can adresss modern GPU
developed with the NVIDIA Volta evolution,

which happened in 2017. Namley that compute
shaders are not any more subject to the
realization restriction of lock step

execution, but have independent thread state.
And because there is independent thread state
there is also independent time spent for a

a work item by each logical thread, if the
submitted logical thread uses a lot of branching
logic or even loops. But the use of branching

and loops is encouraged in independent thread
state programming of compute shaders. The variables
that can drive such logic are the scalar variables:

Tour of WGSL - Control Flow
https://google.github.io/tour-of-wgsl/control-flow/

Then not to waste GPU compute time, by logical
threads doing nothing. You will need to
introduce some load balancing among multiple

logical threads. And MPMC queues are one way to
readize load balancing. Compute shaders with
producer and consumer entry points are proposed

as fundamental architecture by Thunder Kittens:

ThunderKittens: Simple, Fast, and Adorable AI Kernels
https://arxiv.org/abs/2410.20399

They are used by this SpaceX acquisition:

Composer 2 Technical Report
https://arxiv.org/abs/2603.24477

Thunder Kittens uses Hardware support, i.e. tma_expect().

Bye

Chris M. Thomasson schrieb:

never meant to be used in a GPU.
Dmitry CAS version can be used, but

Why do you even need a mpmc queue
in your compute shader anyway?

Chris M. Thomasson schrieb:

I don't think he knows exactly what he is doing... Why does he need a
lock/wait-free queue in a compute shader? What is he trying to do?

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 7/24/2026 5:43 AM, Mild Shock wrote:

Then not to waste GPU compute time, by logical
threads doing nothing.

Well, then never get to a full/empty condition. It depends on what you
are trying to do. If a GPU thread, warp needs to wait on something, then
you are not designing things right to begin with?
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 8/1/2026 2:02 AM, Chris M. Thomasson wrote:

On 7/24/2026 5:43 AM, Mild Shock wrote:

Then not to waste GPU compute time, by logical
threads doing nothing.

Well, then never get to a full/empty condition. It depends on what you
are trying to do. If a GPU thread, warp needs to wait on something, then
you are not designing things right to begin with?

Are you sure you even need FIFO? There is a really fast LIFO stack that
is also atomic. Now, for the GPU you should never have to spinwait, or
wait on anything. You need to be able to always have work to do. There
are certian patterns that work well. Its not like on the CPU where we
can wait in the kernel on conditions, ala futex or something.
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

He uses FIFO, and DMA and Noc:

Getting peak TOPS on a Ryzen AI 7 350 NPU https://destevez.net/2026/05/getting-peak-tops-on-a-ryzen-ai-7-350-npu/

But lets say whether its FIFO or FILO
isn't so importand his used cases are,
what is now found in my library(furryhaze)

for GPU, namely the very basic:

/**
* test_gpu_comp_start(W, K): internal only
* The predicate succeeds. As a side effect it
* starts the -C-WAM W with K warps.
*/
function test_gpu_comp_start(args)

/**
* test_gpu_comp_join(W, P): internal only
* The predicate succeeds in P with a new promise
* that waits for the -C-WAM W to finish.
*/
function test_gpu_comp_join(args)

A GPU interface, via the command processor
for example of WebGPU, does the above
synchronization for you.

In the NPU example he does everything
low level, with Python IRON an stuff:

"Since the main way to achieve synchronization
within the IRON framework is by doing data
movement with object FIFOs, IrCOm sending a
dummy uint32 value as some sort of
synchronization token.

Waiting for all the kernels to finish is
trickier. The object FIFOs support a join
pattern in which an object FIFO consumes an
object from each of multiple object FIFOs,
concatenates these objects and produces the
concatenated object as a result.

Etc.."

Getting peak TOPS on a Ryzen AI 7 350 NPU https://destevez.net/2026/05/getting-peak-tops-on-a-ryzen-ai-7-350-npu/

So Daniel Est|-vez Scientific & Technical
Amateur Radio, gives a nice glimpse into an
NPU, I have not yet publicitly released

my library(furryhaze), since its still in
testing. Maybe take another week or so,
still I have ironed out all corners,

for example the new gpu_comp_start and
gpu_comp_join works fine on may desktop
AI laptops, but I have still a bug on

my iPad AI tablet, on the Redmi AI phone,
also chokes on a test case.

Bye

Chris M. Thomasson schrieb:

On 8/1/2026 2:02 AM, Chris M. Thomasson wrote:

On 7/24/2026 5:43 AM, Mild Shock wrote:

Then not to waste GPU compute time, by logical
threads doing nothing.

Well, then never get to a full/empty condition. It depends on what you
are trying to do. If a GPU thread, warp needs to wait on something,
then you are not designing things right to begin with?

Are you sure you even need FIFO? There is a really fast LIFO stack that
is also atomic. Now, for the GPU you should never have to spinwait, or
wait on anything. You need to be able to always have work to do. There
are certian patterns that work well. Its not like on the CPU where we
can wait in the kernel on conditions, ala futex or something.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

As easy as queues and FIFO objects might
sound. They don't like congestion. NACK for
retransmission might double the Manhattan Distance:

You have not only start
S to end E communication:

+----E
|
|
S

You might also have ACK or NACK
from E or midpoints back to S:

S'
+
+
E'

Ok, I made that up, I have no idea what a flit is,
when the author wrote this here:

"Packet flits are held in the FIFO which can
be used to determine back pressure. Dropping flits
in a NoC may not be possible since these
architectures may not provide an end-to-end
protocol for retransmission."

Routing Algorithms for 2D NoC Architectures http://cva.stanford.edu/classes/ee382c/research/2DRouting.pdf

Bye

Mild Shock schrieb:

Hi,

He uses FIFO, and DMA and Noc:

Getting peak TOPS on a Ryzen AI 7 350 NPU https://destevez.net/2026/05/getting-peak-tops-on-a-ryzen-ai-7-350-npu/

But lets say whether its FIFO or FILO
isn't so importand his used cases are,
what is now found in my library(furryhaze)

for GPU, namely the very basic:

/**
-a* test_gpu_comp_start(W, K): internal only
-a* The predicate succeeds. As a side effect it
-a* starts the -C-WAM W with K warps.
-a*/
function test_gpu_comp_start(args)

/**
-a* test_gpu_comp_join(W, P): internal only
-a* The predicate succeeds in P with a new promise
-a* that waits for the -C-WAM W to finish.
-a*/
function test_gpu_comp_join(args)

A GPU interface, via the command processor
for example of WebGPU, does the above
synchronization for you.

In the NPU example he does everything
low level, with Python IRON an stuff:

"Since the main way to achieve synchronization
within the IRON framework is by doing data
movement with object FIFOs, IrCOm sending a
dummy uint32 value as some sort of
synchronization token.

Waiting for all the kernels to finish is
trickier. The object FIFOs support a join
pattern in which an object FIFO consumes an
object from each of multiple object FIFOs,
concatenates these objects and produces the
concatenated object as a result.

Etc.."

Getting peak TOPS on a Ryzen AI 7 350 NPU https://destevez.net/2026/05/getting-peak-tops-on-a-ryzen-ai-7-350-npu/

So Daniel Est|-vez Scientific & Technical
Amateur Radio, gives a nice glimpse into an
NPU, I have not yet publicitly released

my library(furryhaze), since its still in
testing. Maybe take another week or so,
still I have ironed out all corners,

for example the new gpu_comp_start and
gpu_comp_join works fine on may desktop
AI laptops, but I have still a bug on

my iPad AI tablet, on the Redmi AI phone,
also chokes on a test case.

Bye

Chris M. Thomasson schrieb:

On 8/1/2026 2:02 AM, Chris M. Thomasson wrote:

On 7/24/2026 5:43 AM, Mild Shock wrote:

Then not to waste GPU compute time, by logical
threads doing nothing.

Well, then never get to a full/empty condition. It depends on what
you are trying to do. If a GPU thread, warp needs to wait on
something, then you are not designing things right to begin with?

Are you sure you even need FIFO? There is a really fast LIFO stack
that is also atomic. Now, for the GPU you should never have to
spinwait, or wait on anything. You need to be able to always have work
to do. There are certian patterns that work well. Its not like on the
CPU where we can wait in the kernel on conditions, ala futex or
something.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 8/1/2026 5:22 AM, Mild Shock wrote:

Hi,

As easy as queues and FIFO objects might
sound. They don't like congestion. NACK for
retransmission might double the Manhattan Distance:

[...]

You are going to need a place to allocate nodes in the compute shader.
Of course we can make a special texture to handle it. But, we need to
strive to avoid a wait condition. I don't want a compute shader to spin.
Yes, CAS can be used, but, try to make it be used as a "state machine",
where the transitions from states are atomic. Try to avoid it making a
loop, where we loop on failure.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

WebGPU and WebGL are two different things. I explained
that towards you already like 3-5 times.

Of course we can make a special texture to handle it.

You still don't understand that I am using WebGPU,
and not WebGL. WebGPU has three improvements,
that from your talking are missing in WebGL?

- It has compute shaders
- It has arrays
- It has structs
- What else?

I didn't use structs in my example, although Gemini
nearly forced me to use structs. But you could
use a struct with fields and some of these arrays

to represent a queue. But here in this example
that is open source, I only used flat arrays. I
nowhere needed to abuse textures to store something:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

You can study the source code, the arrays have
CUDA inspired binding annotations but are not
CUDA but rather WGSL:

Hack VM as a Compute Shader in WGSL
@group(0) @binding(0) var<storage, read> code: array<i32>;
@group(0) @binding(1) var<storage, read_write> state: array<i32>; https://github.com/Jean-Luc-Picard-2021/gigabudget/blob/main/course/example63/boot.mjs

You can say whether a buffer is read, or read_write.
Buffers can be transfered from CPU to GPU, before
running commands, and transfered back from GPU to

CPU after running commands. The use case that
you find on GitHub uses both. Namely also fetching
results via a buffer, to then show them in

the HTML page. Shouldn't be much a problem to
run the example at home locally, all you need is
a HTTPS server. But the example is not yet queues,

but it already shows the foundation, which is WebGPU
with its language WGSL and not WebGL with its language
GLSL. These are two different things.

I explained that towards you already like 3-5 times.

Bye

Chris M. Thomasson schrieb:

On 8/1/2026 5:22 AM, Mild Shock wrote:

Hi,

As easy as queues and FIFO objects might
sound. They don't like congestion. NACK for
retransmission might double the Manhattan Distance:

[...]

You are going to need a place to allocate nodes in the compute shader.
Of course we can make a special texture to handle it. But, we need to
strive to avoid a wait condition. I don't want a compute shader to spin. Yes, CAS can be used, but, try to make it be used as a "state machine", where the transitions from states are atomic. Try to avoid it making a
loop, where we loop on failure.

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 8/1/2026 3:43 PM, Mild Shock wrote:

Hi,

WebGPU and WebGL are two different things. I explained
that towards you already like 3-5 times.

Of course we can make a special texture to handle it.

You still don't understand that I am using WebGPU,
and not WebGL. WebGPU has three improvements,
that from your talking are missing in WebGL?

- It has compute shaders
- It has arrays
- It has structs
- What else?[...]

It has textures to work with in the pipeline. But, I still don't know
what you main goal is?
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Chris M. Thomasson wrote:

On 8/1/2026 3:43 PM, Mild Shock wrote:

Hi,

WebGPU and WebGL are two different things. I explained
that towards you already like 3-5 times.

Of course we can make a special texture to handle it.

You still don't understand that I am using WebGPU,
and not WebGL. WebGPU has three improvements,
that from your talking are missing in WebGL?

- It has compute shaders
- It has arrays
- It has structs
- What else?[...]

It has textures to work with in the pipeline. But, I still don't know
what you main goal is?

His main goal is to deride you and "take over".
--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

Why would I use text inside my compute shader.
Could you tell me. The Hack VM doesn't do
textures. You are confused. There is nothing

about textures here:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

You can read the text , it says nowhere
consume or produce textures. Its not a rendering
application. I use the compute shader to run Prolog:

"At the end of 2025 we acquired a couple of
AI Laptops , that were still cheap, since
RAM prices had not yet rocketed. The intend
was to tap into the Copilot+ certified hardware,
and shave off some of the TOPS to do Prolog
inferencing. Amazingly our -C-WAM can
churn 11.4 GIGA LIPS.

GPUs have evolved form lock-step to independent
thread scheduling. This made it possible to
port the Hack VM variant, that forms the basis
for our -C-WAM, to WebGPU computer shaders.
Using NUM_SHADERS = 4096 we could produce
11.4 Giga Lips on a Ryzen AI 7 350 w/ Radeon 860M."

Bye

Chris M. Thomasson schrieb:

On 8/1/2026 3:43 PM, Mild Shock wrote:

Hi,

WebGPU and WebGL are two different things. I explained
that towards you already like 3-5 times.

Of course we can make a special texture to handle it.

You still don't understand that I am using WebGPU,
and not WebGL. WebGPU has three improvements,
that from your talking are missing in WebGL?

- It has compute shaders
- It has arrays
- It has structs
- What else?[...]

It has textures to work with in the pipeline. But, I still don't know
what you main goal is?

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

Hi,

It explicity says "Prolog inferencing" in
this phrase:

shave off some of the TOPS to do Prolog inferencing

It nowhere says draw some fancy stuff into
a Web canvas.

Bye

Mild Shock schrieb:

Hi,

Why would I use text inside my compute shader.
Could you tell me. The Hack VM doesn't do
textures. You are confused. There is nothing

about textures here:

11.4 Giga Lips with a Budget Laptop https://github.com/Jean-Luc-Picard-2021/gigabudget

You can read the text , it says nowhere
consume or produce textures. Its not a rendering
application. I use the compute shader to run Prolog:

"At the end of 2025 we acquired a couple of
AI Laptops , that were still cheap, since
RAM prices had not yet rocketed. The intend
was to tap into the Copilot+ certified hardware,
and shave off some of the TOPS to do Prolog
inferencing. Amazingly our -C-WAM can
churn 11.4 GIGA LIPS.

GPUs have evolved form lock-step to independent
thread scheduling. This made it possible to
port the Hack VM variant, that forms the basis
for our -C-WAM, to WebGPU computer shaders.
Using NUM_SHADERS = 4096 we could produce
11.4 Giga Lips on a Ryzen AI 7 350 w/ Radeon 860M."

Bye

Chris M. Thomasson schrieb:

On 8/1/2026 3:43 PM, Mild Shock wrote:

Hi,

WebGPU and WebGL are two different things. I explained
that towards you already like 3-5 times.

Of course we can make a special texture to handle it.

You still don't understand that I am using WebGPU,
and not WebGL. WebGPU has three improvements,
that from your talking are missing in WebGL?

- It has compute shaders
- It has arrays
- It has structs
- What else?[...]

It has textures to work with in the pipeline. But, I still don't know
what you main goal is?

--- Synchronet 3.22a-Linux NewsLink 1.2

From Newsgroup: sci.math

On 8/1/2026 5:38 PM, Mild Shock wrote:

Hi,

It explicity says "Prolog inferencing" in
this phrase:

shave off some of the TOPS to do Prolog inferencing

It nowhere says draw some fancy stuff into
a Web canvas.

Using texture(s) we can make the state(s) and have the compute shader
use said formatted state. Computing vector fields is just one thing we
can do.

[...]>

--- Synchronet 3.22a-Linux NewsLink 1.2