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Patent pending.
Quantum teleportation bus for FTL (faster than light) operations in multiple=
processor architecture
1024-bit architecture with 10-17 Qbit processors
Serial supercomputing CPU:s with massive multithreaded architecture =C3=A1 l=
a Sparc Niagra/AMD Ryzen working name sparcplug1024
Massive L2 cache
High clock speed ~12.7 GHz per thread
256-8192 threads per core
16-64 Multiple on chip cores for optimal hardware and electrical performance= =20
1-512 CPU:s per system, 16-64 cores each, 256-8192 threads per core
=3D 4096 - 268435456 threads per physical system
Systems can be combined through networking for practically infinite scaling
L2 on chip error correcting/error detecting secondary memory ecDRAM at 512GB= -262144GB
L1 on quantum entanglement bus qecDRAM 8192GB-536870912GB primary error corr= ecting/error detecting primary memory with Quantum FTL memory access=20
Networking:
Quantum Entanglement Internet/IP 4 physical Quantum Entanglement "teleportat= ion" Ethernet, 4 ports per CPU
Operating system:
QSSysVI
(Quantum Super System 6)
Quantum L3 logic gate
Quantum entanglement chip with "teleportation" access to other physical equi= valent nodes
Quantum entanglement chip with "teleportation" access to primary memory qecD= RAM
10-17 Qbit processors =C3=A1 la Kookaburra
There is not and isn't going to be qRAM because it wouldn't be deterministic=
Best regards,
Jussi Korkala
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<html class=3D"apple-mail-supports-explicit-dark-mode"><head><meta http-equi= v=3D"content-type" content=3D"text/html; charset=3Dutf-8"></head><body dir=3D= "auto"><div><br></div><div>Patent pending.</div><div><br></div><div style=3D= "font-size: 16px; max-width: 100%; position: static; -webkit-tap-highlight-c= olor: rgba(0, 0, 0, 0);"><span style=3D"max-width: 100%; font-size: 12pt; -w= ebkit-text-size-adjust: 100%;">Quantum teleportation bus for FTL (faster tha=
n light) operations in multiple processor architecture</span><br style=3D"ma= x-width: 100%;"></div><div style=3D"font-size: 16px; max-width: 100%; positi= on: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max= -width: 100%;"></div><div style=3D"font-size: 16px; max-width: 100%; positio= n: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">1024-bit architec= ture with 10-17 Qbit processors</div><div style=3D"font-size: 16px; max-widt= h: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><= br style=3D"max-width: 100%;"></div><div style=3D"font-size: 16px; max-width=
: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">Se= rial supercomputing CPU:s with massive multithreaded architecture =C3=A1 la S= parc Niagra/AMD Ryzen working name sparcplug1024</div><div style=3D"font-siz= e: 16px; max-width: 100%; position: static; -webkit-tap-highlight-color: rgb= a(0, 0, 0, 0);"><br style=3D"max-width: 100%;"></div><div style=3D"font-size=
: 16px; max-width: 100%; position: static; -webkit-tap-highlight-color: rgba= (0, 0, 0, 0);">Massive L2 cache</div><div style=3D"font-size: 16px; max-widt= h: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">H= igh clock speed ~12.7 GHz per thread</div><div style=3D"font-size: 16px; max= -width: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0= );">256-8192 threads per core</div><div style=3D"font-size: 16px; max-width:=
100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">16-= 64 Multiple on chip cores for optimal hardware and electrical performance&nb= sp;</div><div style=3D"font-size: 16px; max-width: 100%; position: static; -= webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-width: 100%;= "></div><div style=3D"font-size: 16px; max-width: 100%; position: static; -w= ebkit-tap-highlight-color: rgba(0, 0, 0, 0);">1-512 CPU:s per system, 16-64 c= ores each, 256-8192 threads per core</div><div style=3D"font-size: 16px; max= -width: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0= );">=3D 4096 - 268435456 threads per physical system</div><div style=3D"font= -size: 16px; max-width: 100%; position: static; -webkit-tap-highlight-color:=
rgba(0, 0, 0, 0);"><br style=3D"max-width: 100%;"></div><div style=3D"font-= size: 16px; max-width: 100%; position: static; -webkit-tap-highlight-color: r= gba(0, 0, 0, 0);">Systems can be combined through networking for practically=
infinite scaling</div><div style=3D"font-size: 16px; max-width: 100%; posit= ion: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">L2 on chip erro=
r correcting/error detecting secondary memory ecDRAM at 512GB-262144GB</div>= <div style=3D"font-size: 16px; max-width: 100%; position: static; -webkit-ta= p-highlight-color: rgba(0, 0, 0, 0);">L1 on quantum entanglement bus qecDRAM=
8192GB-536870912GB primary error correcting/error detecting primary memory w= ith Quantum FTL memory access </div><div style=3D"font-size: 16px; max-= width: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0)= ;"><br style=3D"max-width: 100%;"></div><div style=3D"font-size: 16px; max-w= idth: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);= ">Networking:</div><div style=3D"font-size: 16px; max-width: 100%; position:=
static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-wi= dth: 100%;"></div><div style=3D"font-size: 16px; max-width: 100%; position: s= tatic; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">Quantum Entanglement I= nternet/IP 4 physical Quantum Entanglement "teleportation" Ethernet, 4 ports=
per CPU</div><div style=3D"font-size: 16px; max-width: 100%; position: stat= ic; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-width: 1= 00%;"></div><div style=3D"font-size: 16px; max-width: 100%; position: static=
; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-width: 10= 0%;"></div><div style=3D"font-size: 16px; max-width: 100%; position: static;=
-webkit-tap-highlight-color: rgba(0, 0, 0, 0);">Operating system:</div><div=
style=3D"font-size: 16px; max-width: 100%; position: static; -webkit-tap-hi= ghlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-width: 100%;"></div><div s= tyle=3D"font-size: 16px; max-width: 100%; position: static; -webkit-tap-high= light-color: rgba(0, 0, 0, 0);">QSSysVI</div><div style=3D"font-size: 16px; m= ax-width: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0,=
0);"><br style=3D"max-width: 100%;"></div><div style=3D"font-size: 16px; ma= x-width: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0= );">(Quantum Super System 6)</div><div style=3D"font-size: 16px; max-width: 1= 00%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><br s= tyle=3D"max-width: 100%;"></div><div style=3D"font-size: 16px; max-width: 10= 0%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">Quantu=
m L3 logic gate</div><div style=3D"font-size: 16px; max-width: 100%; positio= n: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-= width: 100%;"></div><div style=3D"font-size: 16px; max-width: 100%; position=
: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">Quantum entangleme= nt chip with "teleportation" access to other physical equivalent nodes</div>= <div style=3D"font-size: 16px; max-width: 100%; position: static; -webkit-ta= p-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-width: 100%;"></div><= div style=3D"font-size: 16px; max-width: 100%; position: static; -webkit-tap= -highlight-color: rgba(0, 0, 0, 0);">Quantum entanglement chip with "telepor= tation" access to primary memory qecDRAM</div><div style=3D"font-size: 16px;=
max-width: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0= , 0);"><br style=3D"max-width: 100%;"></div><div style=3D"font-size: 16px; m= ax-width: 100%; position: static; -webkit-tap-highlight-color: rgba(0, 0, 0,=
0);">10-17 Qbit processors =C3=A1 la Kookaburra</div><div style=3D"font-siz= e: 16px; max-width: 100%; position: static; -webkit-tap-highlight-color: rgb= a(0, 0, 0, 0);"><br style=3D"max-width: 100%;"></div><div style=3D"font-size=
: 16px; max-width: 100%; position: static; -webkit-tap-highlight-color: rgba= (0, 0, 0, 0);">There is not and isn't going to be qRAM because it wouldn't b=
e deterministic</div><div style=3D"font-size: 16px; max-width: 100%; positio= n: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-= width: 100%;"></div><div style=3D"font-size: 16px; max-width: 100%; position=
: static; -webkit-tap-highlight-color: rgba(0, 0, 0, 0);">Best regards,</div= ><div style=3D"font-size: 16px; max-width: 100%; position: static; -webkit-t= ap-highlight-color: rgba(0, 0, 0, 0);"><br style=3D"max-width: 100%;"></div>= <div style=3D"font-size: 16px; max-width: 100%; position: static; -webkit-ta= p-highlight-color: rgba(0, 0, 0, 0);">Jussi Korkala</div><div style=3D"font-= size: 16px; max-width: 100%; position: static; -webkit-tap-highlight-color: r= gba(0, 0, 0, 0);"><br></div></body></html>=
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