EricP <ThatWouldBeTelling@thevillage.com> writes:
I don't know what 780 used for its integer multiplier
(I can't find it in the schematics).
Then I expect that it used microcode to do 1 multiplier bit per cycle.
According to Anton Ertl <anton@mips.complang.tuwien.ac.at>:
EricP <ThatWouldBeTelling@thevillage.com> writes:
I don't know what 780 used for its integer multiplier
(I can't find it in the schematics).
Then I expect that it used microcode to do 1 multiplier bit per cycle.
This paper measured the 780's performance by making microcode histograms
of running programs. In one table it says the integer multiply and divide were handled by the same subsystem as floating point instructions.
https://people.csail.mit.edu/emer/media/papers/1984.05.isca.vax.pdf
Adding to the confusion, there was an optional floating point accelerator which presumably added hardware to do what used to be done in microcode,
but they don't mention that at all.
There is a follow-up to that 1984 paper
"A Characterization of Processor Performance in the VAX-11/780"
from 1998 by the same authors called
"RETROSPECTIVE: Characterization of Processor Performance in the VAX-11 /780" >which makes that following admission:
"In particular, while the VAX-11/780,
which was introduced in 1978, was probably the
preeminent timesharing machine on university
campuses at that time, very little was known about
how it worked or exactly what its performance
was.
In particular, before 1980, even inside Digital
the fact that some benchmarks ran at less than the
widely-believed 1 MIPS was known to only a very
small number of people. And the fact that on real
multiuser workloads the 11/780 typically executed
instructions at only 0.5 MIPS was apparently
unknown.
According to EricP <ThatWouldBeTelling@thevillage.com>:
There is a follow-up to that 1984 paper
"A Characterization of Processor Performance in the VAX-11/780"
from 1998 by the same authors called
"RETROSPECTIVE: Characterization of Processor Performance in the VAX-11 /780"
which makes that following admission:
"In particular, while the VAX-11/780,
which was introduced in 1978, was probably the
preeminent timesharing machine on university
campuses at that time, very little was known about
how it worked or exactly what its performance
was.
In particular, before 1980, even inside Digital
the fact that some benchmarks ran at less than the
widely-believed 1 MIPS was known to only a very
small number of people. And the fact that on real
multiuser workloads the 11/780 typically executed
instructions at only 0.5 MIPS was apparently
unknown.
I saw that and was kind of surprised. I don't know when I first heard this,
but
it was widely believed that the 780 was about the same speed at a 370/158 which
IBM said was 1 MIPS. The obvious implication is that VAX did twice as much work
per instruction as a 370 which is not implausible. So depending on how you define MIPS, it's not strictly false.
How did I know that and people at DEC not? Maybe they needed to get out more.
According to EricP <ThatWouldBeTelling@thevillage.com>:
There is a follow-up to that 1984 paper
"A Characterization of Processor Performance in the VAX-11/780"
from 1998 by the same authors called
"RETROSPECTIVE: Characterization of Processor Performance in the VAX-11 /780" >>which makes that following admission:
"In particular, while the VAX-11/780,
which was introduced in 1978, was probably the
preeminent timesharing machine on university
campuses at that time, very little was known about
how it worked or exactly what its performance
was.
In particular, before 1980, even inside Digital
the fact that some benchmarks ran at less than the
widely-believed 1 MIPS was known to only a very
small number of people. And the fact that on real
multiuser workloads the 11/780 typically executed
instructions at only 0.5 MIPS was apparently
unknown.
I saw that and was kind of surprised. I don't know when I first heard this, but
it was widely believed that the 780 was about the same speed at a 370/158 which
IBM said was 1 MIPS. The obvious implication is that VAX did twice as much work
per instruction as a 370 which is not implausible. So depending on how you define MIPS, it's not strictly false.
How did I know that and people at DEC not? Maybe they needed to get out more.
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