When I started at Burroughs, they had just started a project
to increase amount of memory that could be accessed by
an application on the medium systems (B3500) line. The
B3500 had a flat one million digit address space and
could run in rCycontrol staterCO or rCynormal staterCO. When the
base register had the value zero, the processor ran in
control state and privileged instructions were available,
otherwise the processor was is normal state and the
1md address space started at the privileged base register and
ended at the privileged limit register.
scott@slp53.sl.home (Scott Lurndal) writes:
When I started at Burroughs, they had just started a project
to increase amount of memory that could be accessed by
an application on the medium systems (B3500) line. The
B3500 had a flat one million digit address space and
could run in rCycontrol staterCO or rCynormal staterCO. When the
base register had the value zero, the processor ran in
control state and privileged instructions were available,
otherwise the processor was is normal state and the
1md address space started at the privileged base register and
ended at the privileged limit register.
ThatrCOs an interesting approach! I had no idea how the Medium Systems
line worked.
scott@slp53.sl.home (Scott Lurndal) writes:
When I started at Burroughs, they had just started a project
to increase amount of memory that could be accessed by
an application on the medium systems (B3500) line. The
B3500 had a flat one million digit address space and
could run in acontrol stateA or anormal stateA. When the
base register had the value zero, the processor ran in
control state and privileged instructions were available,
otherwise the processor was is normal state and the
1md address space started at the privileged base register and
ended at the privileged limit register.
ThatAs an interesting approach! I had no idea how the Medium Systems
line worked.
YouAd think youAd see a lot of experimentation around things like this >nowadays that you can get your own open-source chip design fabbed
through Tiny Tapeout for US$300, including in IHPAs 350GHz 130nm SiGe
BiCMOS process. (Not 350MHz; fT is 350GHz.)
Without Tiny Tapeout, IHPAs MPW price for that oSG13G2o process is
C7300/mm# with a minimum of 0.8mm#, which I find a rather daunting
pricetag for something that probably wonAt work the first time. As I >understand it, that kind of thing is what sunk Chuck MooreAs chip design >efforts at iTV in the 90s: they didnAt have enough capital to iterate
fast enough with MPW runs through MOSIS to ever ship a working chip.
New approaches to protection seem like an especially promising area as
we smash headfirst into the ovulnpocalypseo and AI generates exploits
for the swiss-cheese computer systems the whole internet is built on.
Kragen
He has designed an IC CMOS opamp and is having some fabbed. Even kids
can do that nowadays.
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