From Newsgroup: alt.2600

rek2 hispagatos <rek2@hispagatos.org.invalid> writes:

RISC-V is a free and open microprocessor instruction set architecture (ISA). But is that why it matters? HererCOs my take.

Can you summarize?

Kragen
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From Newsgroup: alt.2600

On 29/08/2026 5:37 AM, Kragen Javier Sitaker wrote:

rek2 hispagatos <rek2@hispagatos.org.invalid> writes:

RISC-V is a free and open microprocessor instruction set architecture (ISA). >> But is that why it matters? HererCOs my take.

Can you summarize?

Kragen

I thought it was simply a /patent free/ version of a S.P.I.M. compatible
core, and while popular now, it's basically irrelevant in the sense that
I believe all S.P.I.M. compatibility patents have expired so you're com- pletely free to make your own implementation, and won't have to tell the
former patent holder. [1]

They sell RISC-V cores these days anyway. Does RISC-V matter to you?


[1] I claim this right justification was entirely accidental, and not a
result of an L.L.M. In any case, I think they can't right justify their output.
--
Johann | email: invalid -> com | http://www.myrkraverk.com/blog/
I'm not from the Internet, I just work there. | via Easynews.com https://bsky.app/profile/myrkraverk.bsky.social | for ( ;; ) _:;
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From Newsgroup: alt.2600

Johann 'Myrkraverk' Oskarsson <johann@myrkraverk.invalid> writes:

On 29/08/2026 5:37 AM, Kragen Javier Sitaker wrote:

rek2 hispagatos <rek2@hispagatos.org.invalid> writes:

RISC-V is a free and open microprocessor instruction set architecture (ISA).
But is that why it matters? HererCOs my take.

Can you summarize?
Kragen

I thought it was simply a /patent free/ version of a S.P.I.M. compatible core, and while popular now, it's basically irrelevant in the sense that
I believe all S.P.I.M. compatibility patents have expired so you're com- pletely free to make your own implementation, and won't have to tell the former patent holder. [1]

They sell RISC-V cores these days anyway. Does RISC-V matter to you?

To me, RISC-V seems like a pretty reasonable ISA; as you say, itrCOs very similar to MIPS. ItrCOs boring, but in a good way. For people doing
computer architecture support, itrCOs important to have an ISA with good support in GCC that isnrCOt a patent minefield. And for 32-bit microcontrollers it seems to use significantly less real estate and
power than popular alternatives like ARM.

But Recados said, rCLBut is that why it matters? HererCOs my take.rCY (Possibly they were quoting someone else; it wasnrCOt clear.) And then didnrCOt actually post their take, just a link to a YouTube video. So I
was hoping that they might explain what their take was, rather than
inviting me to sit through a YouTube video to find out.

[1] I claim this right justification was entirely accidental, and not a result of an L.L.M. In any case, I think they can't right justify their output.

A new CAPTCHA technique! I have preserved your achievement in my quote,
but have not attempted to duplicate it.

Kragen
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From Newsgroup: alt.2600

On 30/08/2026 11:48 PM, Kragen Javier Sitaker wrote:

Johann 'Myrkraverk' Oskarsson <johann@myrkraverk.invalid> writes:

On 29/08/2026 5:37 AM, Kragen Javier Sitaker wrote:

rek2 hispagatos <rek2@hispagatos.org.invalid> writes:

RISC-V is a free and open microprocessor instruction set architecture (ISA).
But is that why it matters? HererCOs my take.

Can you summarize?
Kragen

I thought it was simply a /patent free/ version of a S.P.I.M. compatible
core, and while popular now, it's basically irrelevant in the sense that
I believe all S.P.I.M. compatibility patents have expired so you're com-
pletely free to make your own implementation, and won't have to tell the
former patent holder. [1]

They sell RISC-V cores these days anyway. Does RISC-V matter to you?

To me, RISC-V seems like a pretty reasonable ISA; as you say, itrCOs very similar to MIPS. ItrCOs boring, but in a good way. For people doing computer architecture support, itrCOs important to have an ISA with good support in GCC that isnrCOt a patent minefield. And for 32-bit microcontrollers it seems to use significantly less real estate and
power than popular alternatives like ARM.

Dear Kragen,

I admit lack of knowledge when it comes to design I.S.As. So for now I
will take your word for it, and move on to the next paragraph.

But Recados said, rCLBut is that why it matters? HererCOs my take.rCY (Possibly they were quoting someone else; it wasnrCOt clear.) And then didnrCOt actually post their take, just a link to a YouTube video. So I
was hoping that they might explain what their take was, rather than
inviting me to sit through a YouTube video to find out.

Yes, that is a bit rude. I mean, I have referenced Youtube videos on a
subject -- the whole channel, assuming it still exists -- but then I
have nothing else -- nor more -- to say on that subject. And it's a
subject that I can't just summarize in a paragraph.

For the curious, that's the entire Youtube channel of Randall Carlsson,
and I believe his videos have also been posted on archive.org, for
archival purposes.

[1] I claim this right justification was entirely accidental, and not a
result of an L.L.M. In any case, I think they can't right justify their
output.

A new CAPTCHA technique! I have preserved your achievement in my quote,
but have not attempted to duplicate it.

Kragen

Neither did I, for this followup. Sometimes it's fun, and sometimes
it's not. Today, it's not fun to right justify my textual output.


Best wishes, and happy new RISC-V in V.H.D.L!
--
Johann | email: invalid -> com | http://www.myrkraverk.com/blog/
I'm not from the Internet, I just work there. | via Easynews.com https://bsky.app/profile/myrkraverk.bsky.social | for ( ;; ) _:;
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