[$] Approaches to reducing TLB pressure

Date:
Wed, 02 Apr 2025 13:45:59 +0000

Description:
The CPU's translation lookaside buffer (TLB) caches the results of virtual-address translations, significantly speeding memory accesses. TLB misses are expensive, so a lot of thought goes into using the TLB as efficiently as possible. Reducing pressure on the TLB was the topic of Rik
van Riel's memory-management-track session at the 2025 Linux Storage, Filesystem, Memory-Management, and BPF Summit. Some approaches were considered, but the session was short on firm conclusions.

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Link to news story:
https://lwn.net/Articles/1016009/


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